Skip to content

R
riscv-gcc-1
Commit 9ce88f5e by Gabriel Dos Reis Committed by Gabriel Dos Reis
Options

rtl.h (union rtunion_def): Have all members start with the prefix "rt_". 

        * rtl.h (union rtunion_def): Have all members  start with the
        prefix "rt_".
        (XINT, XSTR, XEXP, XVEC, XMODE, XBITMAP, XTREE, XBBDEF, XTMPL,
        X0INT, X0UINT, X0STR, X0EXP, X0VEC, X0MODE, X0BITMAP, X0TREE,
        X0MEMATTR, X0BBDEF, X0REGATTR, XCINT, XCUINT, XCSTR, XCEXP,
        XCVEC, XCMODE, XCBITMAP, XCTREE, XCBBDEF, XC2EXP): Adjust
        members
        access.
        * gengtype.c (adjust_field_rtx_def): Likewise.
        * rtlanal.c (loc_mentioned_in_p): Likewise.

From-SVN: r85434
parent b1cc95ce
Showing with 81 additions and 69 deletions
gcc/ChangeLog
2004-08-02 Gabriel Dos Reis <gdr@integrable-solutions.net>
* rtl.h (union rtunion_def): Have all members start with the
prefix "rt_".
(XINT, XSTR, XEXP, XVEC, XMODE, XBITMAP, XTREE, XBBDEF, XTMPL,
X0INT, X0UINT, X0STR, X0EXP, X0VEC, X0MODE, X0BITMAP, X0TREE,
X0MEMATTR, X0BBDEF, X0REGATTR, XCINT, XCUINT, XCSTR, XCEXP,
XCVEC, XCMODE, XCBITMAP, XCTREE, XCBBDEF, XC2EXP): Adjust members
access.
* gengtype.c (adjust_field_rtx_def): Likewise.
* rtlanal.c (loc_mentioned_in_p): Likewise.
2004-08-02 Richard Sandiford <rsandifo@redhat.com>
* config.gcc (mips*-*-elf*, mips*-*-rtems*): Add elfos.h to tm_file.
......
gcc/gengtype.c
......@@ -449,24 +449,24 @@ adjust_field_rtx_def (type_p t, options_p ARG_UNUSED (opt))
number notes. */
case NOTE_INSN_MAX:
note_flds->opt->name = "default";
note_flds->name = "rtstr";
note_flds->name = "rt_str";
note_flds->type = &string_type;
break;
case NOTE_INSN_BLOCK_BEG:
case NOTE_INSN_BLOCK_END:
note_flds->name = "rttree";
note_flds->name = "rt_tree";
note_flds->type = tree_tp;
break;
case NOTE_INSN_EXPECTED_VALUE:
case NOTE_INSN_VAR_LOCATION:
note_flds->name = "rtx";
note_flds->name = "rt_rtx";
note_flds->type = rtx_tp;
break;
default:
note_flds->name = "rtint";
note_flds->name = "rt_int";
note_flds->type = scalar_tp;
break;
}
......@@ -497,48 +497,48 @@ adjust_field_rtx_def (type_p t, options_p ARG_UNUSED (opt))
case 'n':
case 'w':
t = scalar_tp;
subname = "rtint";
subname = "rt_int";
break;
case '0':
if (i == MEM && aindex == 1)
t = mem_attrs_tp, subname = "rtmem";
t = mem_attrs_tp, subname = "rt_mem";
else if (i == JUMP_INSN && aindex == 9)
t = rtx_tp, subname = "rtx";
t = rtx_tp, subname = "rt_rtx";
else if (i == CODE_LABEL && aindex == 4)
t = scalar_tp, subname = "rtint";
t = scalar_tp, subname = "rt_int";
else if (i == CODE_LABEL && aindex == 5)
t = rtx_tp, subname = "rtx";
t = rtx_tp, subname = "rt_rtx";
else if (i == LABEL_REF
&& (aindex == 1 || aindex == 2))
t = rtx_tp, subname = "rtx";
t = rtx_tp, subname = "rt_rtx";
else if (i == NOTE && aindex == 4)
t = note_union_tp, subname = "";
else if (i == NOTE && aindex >= 7)
t = scalar_tp, subname = "rtint";
t = scalar_tp, subname = "rt_int";
else if (i == ADDR_DIFF_VEC && aindex == 4)
t = scalar_tp, subname = "rtint";
t = scalar_tp, subname = "rt_int";
else if (i == VALUE && aindex == 0)
t = scalar_tp, subname = "rtint";
t = scalar_tp, subname = "rt_int";
else if (i == REG && aindex == 1)
t = scalar_tp, subname = "rtint";
t = scalar_tp, subname = "rt_int";
else if (i == REG && aindex == 2)
t = reg_attrs_tp, subname = "rtreg";
t = reg_attrs_tp, subname = "rt_reg";
else if (i == SCRATCH && aindex == 0)
t = scalar_tp, subname = "rtint";
t = scalar_tp, subname = "rt_int";
else if (i == SYMBOL_REF && aindex == 1)
t = scalar_tp, subname = "rtint";
t = scalar_tp, subname = "rt_int";
else if (i == SYMBOL_REF && aindex == 2)
t = tree_tp, subname = "rttree";
t = tree_tp, subname = "rt_tree";
else if (i == BARRIER && aindex >= 3)
t = scalar_tp, subname = "rtint";
t = scalar_tp, subname = "rt_int";
else
{
error_at_line (&lexer_line,
"rtx type `%s' has `0' in position %lu, can't handle",
rtx_name[i], (unsigned long) aindex);
t = &string_type;
subname = "rtint";
subname = "rt_int";
}
break;
......@@ -546,34 +546,34 @@ adjust_field_rtx_def (type_p t, options_p ARG_UNUSED (opt))
case 'S':
case 'T':
t = &string_type;
subname = "rtstr";
subname = "rt_str";
break;
case 'e':
case 'u':
t = rtx_tp;
subname = "rtx";
subname = "rt_rtx";
break;
case 'E':
case 'V':
t = rtvec_tp;
subname = "rtvec";
subname = "rt_rtvec";
break;
case 't':
t = tree_tp;
subname = "rttree";
subname = "rt_tree";
break;
case 'b':
t = bitmap_tp;
subname = "rtbit";
subname = "rt_bit";
break;
case 'B':
t = basic_block_tp;
subname = "bb";
subname = "rt_bb";
break;
default:
......@@ -582,7 +582,7 @@ adjust_field_rtx_def (type_p t, options_p ARG_UNUSED (opt))
rtx_name[i], rtx_format[i][aindex],
(unsigned long)aindex);
t = &string_type;
subname = "rtint";
subname = "rt_int";
break;
}
......
gcc/rtl.h
......@@ -161,19 +161,19 @@ typedef struct reg_attrs GTY(())
union rtunion_def
{
int rtint;
unsigned int rtuint;
const char *rtstr;
rtx rtx;
rtvec rtvec;
enum machine_mode rttype;
int rt_int;
unsigned int rt_uint;
const char *rt_str;
rtx rt_rtx;
rtvec rt_rtvec;
enum machine_mode rt_type;
addr_diff_vec_flags rt_addr_diff_vec_flags;
struct cselib_val_struct *rt_cselib;
struct bitmap_head_def *rtbit;
tree rttree;
struct basic_block_def *bb;
mem_attrs *rtmem;
reg_attrs *rtreg;
struct bitmap_head_def *rt_bit;
tree rt_tree;
struct basic_block_def *rt_bb;
mem_attrs *rt_mem;
reg_attrs *rt_reg;
};
typedef union rtunion_def rtunion;
......@@ -602,15 +602,15 @@ do { \
_rtx->return_val = 0; \
} while (0)
#define XINT(RTX, N) (RTL_CHECK2 (RTX, N, 'i', 'n').rtint)
#define XSTR(RTX, N) (RTL_CHECK2 (RTX, N, 's', 'S').rtstr)
#define XEXP(RTX, N) (RTL_CHECK2 (RTX, N, 'e', 'u').rtx)
#define XVEC(RTX, N) (RTL_CHECK2 (RTX, N, 'E', 'V').rtvec)
#define XMODE(RTX, N) (RTL_CHECK1 (RTX, N, 'M').rttype)
#define XBITMAP(RTX, N) (RTL_CHECK1 (RTX, N, 'b').rtbit)
#define XTREE(RTX, N) (RTL_CHECK1 (RTX, N, 't').rttree)
#define XBBDEF(RTX, N) (RTL_CHECK1 (RTX, N, 'B').bb)
#define XTMPL(RTX, N) (RTL_CHECK1 (RTX, N, 'T').rtstr)
#define XINT(RTX, N) (RTL_CHECK2 (RTX, N, 'i', 'n').rt_int)
#define XSTR(RTX, N) (RTL_CHECK2 (RTX, N, 's', 'S').rt_str)
#define XEXP(RTX, N) (RTL_CHECK2 (RTX, N, 'e', 'u').rt_rtx)
#define XVEC(RTX, N) (RTL_CHECK2 (RTX, N, 'E', 'V').rt_rtvec)
#define XMODE(RTX, N) (RTL_CHECK1 (RTX, N, 'M').rt_type)
#define XBITMAP(RTX, N) (RTL_CHECK1 (RTX, N, 'b').rt_bit)
#define XTREE(RTX, N) (RTL_CHECK1 (RTX, N, 't').rt_tree)
#define XBBDEF(RTX, N) (RTL_CHECK1 (RTX, N, 'B').rt_bb)
#define XTMPL(RTX, N) (RTL_CHECK1 (RTX, N, 'T').rt_str)
#define XVECEXP(RTX, N, M) RTVEC_ELT (XVEC (RTX, N), M)
#define XVECLEN(RTX, N) GET_NUM_ELEM (XVEC (RTX, N))
......@@ -618,39 +618,39 @@ do { \
/* These are like XINT, etc. except that they expect a '0' field instead
of the normal type code. */
#define X0INT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rtint)
#define X0UINT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rtuint)
#define X0STR(RTX, N) (RTL_CHECK1 (RTX, N, '0').rtstr)
#define X0EXP(RTX, N) (RTL_CHECK1 (RTX, N, '0').rtx)
#define X0VEC(RTX, N) (RTL_CHECK1 (RTX, N, '0').rtvec)
#define X0MODE(RTX, N) (RTL_CHECK1 (RTX, N, '0').rttype)
#define X0BITMAP(RTX, N) (RTL_CHECK1 (RTX, N, '0').rtbit)
#define X0TREE(RTX, N) (RTL_CHECK1 (RTX, N, '0').rttree)
#define X0BBDEF(RTX, N) (RTL_CHECK1 (RTX, N, '0').bb)
#define X0INT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_int)
#define X0UINT(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_uint)
#define X0STR(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_str)
#define X0EXP(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_rtx)
#define X0VEC(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_rtvec)
#define X0MODE(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_type)
#define X0BITMAP(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_bit)
#define X0TREE(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_tree)
#define X0BBDEF(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_bb)
#define X0ADVFLAGS(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_addr_diff_vec_flags)
#define X0CSELIB(RTX, N) (RTL_CHECK1 (RTX, N, '0').rt_cselib)
#define X0MEMATTR(RTX, N) (RTL_CHECKC1 (RTX, N, MEM).rtmem)
#define X0REGATTR(RTX, N) (RTL_CHECKC1 (RTX, N, REG).rtreg)
#define X0MEMATTR(RTX, N) (RTL_CHECKC1 (RTX, N, MEM).rt_mem)
#define X0REGATTR(RTX, N) (RTL_CHECKC1 (RTX, N, REG).rt_reg)
/* Access a '0' field with any type. */
#define X0ANY(RTX, N) RTL_CHECK1 (RTX, N, '0')
#define XCINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rtint)
#define XCUINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rtuint)
#define XCSTR(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rtstr)
#define XCEXP(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rtx)
#define XCVEC(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rtvec)
#define XCMODE(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rttype)
#define XCBITMAP(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rtbit)
#define XCTREE(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rttree)
#define XCBBDEF(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).bb)
#define XCINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_int)
#define XCUINT(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_uint)
#define XCSTR(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_str)
#define XCEXP(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_rtx)
#define XCVEC(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_rtvec)
#define XCMODE(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_type)
#define XCBITMAP(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_bit)
#define XCTREE(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_tree)
#define XCBBDEF(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_bb)
#define XCADVFLAGS(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_addr_diff_vec_flags)
#define XCCSELIB(RTX, N, C) (RTL_CHECKC1 (RTX, N, C).rt_cselib)
#define XCVECEXP(RTX, N, M, C) RTVEC_ELT (XCVEC (RTX, N, C), M)
#define XCVECLEN(RTX, N, C) GET_NUM_ELEM (XCVEC (RTX, N, C))
#define XC2EXP(RTX, N, C1, C2) (RTL_CHECKC2 (RTX, N, C1, C2).rtx)
#define XC2EXP(RTX, N, C1, C2) (RTL_CHECKC2 (RTX, N, C1, C2).rt_rtx)
/* ACCESS MACROS for particular fields of insns. */
......
gcc/rtlanal.c
......@@ -3155,7 +3155,7 @@ loc_mentioned_in_p (rtx *loc, rtx in)
for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
{
if (loc == &in->u.fld[i].rtx)
if (loc == &in->u.fld[i].rt_rtx)
return 1;
if (fmt[i] == 'e')
{
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment