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Commit 9caea35c by Kazu Hirata Committed by Kazu Hirata
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m68hc11.c: Fix comment formatting. 

	* config/m68hc11/m68hc11.c: Fix comment formatting.
	* config/m68hc11/m68hc11.h: Likewise.
	* config/m68hc11/m68hc11.md: Likewise.

From-SVN: r46706
parent 157689c6
Showing with 84 additions and 78 deletions
gcc/ChangeLog
2001-11-01 Kazu Hirata <kazu@hxi.com>
* config/m68hc11/m68hc11.c: Fix comment formatting.
* config/m68hc11/m68hc11.h: Likewise.
* config/m68hc11/m68hc11.md: Likewise.
2001-11-01 Neil Booth <neil@daikokuya.demon.co.uk>
* c-typeck.c (default_conversion): Retain the original expression
......
gcc/config/m68hc11/m68hc11.c
......@@ -79,7 +79,7 @@ static void m68hc11_asm_out_destructor PARAMS ((rtx, int));
rtx m68hc11_soft_tmp_reg;
/* Must be set to 1 to produce debug messages. */
/* Must be set to 1 to produce debug messages. */
int debug_m6811 = 0;
extern FILE *asm_out_file;
......@@ -299,7 +299,7 @@ m68hc11_conditional_register_usage ()
}
/* Reload and register operations. */
/* Reload and register operations. */
static const char *const reg_class_names[] = REG_CLASS_NAMES;
......@@ -689,7 +689,7 @@ m68hc11_reload_operands (operands)
mode = GET_MODE (operands[1]);
/* Input reload of indirect addressing (MEM (PLUS (REG) (CONST))). */
/* Input reload of indirect addressing (MEM (PLUS (REG) (CONST))). */
if (A_REG_P (operands[0]) && memory_reload_operand (operands[1], mode))
{
rtx big_offset = XEXP (XEXP (operands[1], 0), 1);
......@@ -771,7 +771,7 @@ m68hc11_reload_operands (operands)
}
}
/* Use the normal gen_movhi pattern. */
/* Use the normal gen_movhi pattern. */
return 0;
}
......@@ -1201,7 +1201,7 @@ m68hc11_function_arg_pass_by_reference (cum, mode, type, named)
int named ATTRIBUTE_UNUSED;
{
return ((type && TREE_CODE (type) == ARRAY_TYPE)
/* Consider complex values as aggregates, so care for TCmode. */
/* Consider complex values as aggregates, so care for TCmode. */
/*|| GET_MODE_SIZE (mode) > 4 SCz, temporary */
/*|| (type && AGGREGATE_TYPE_P (type))) */ );
}
......@@ -2005,7 +2005,7 @@ dead_register_here (x, reg)
}
/* Scan forward to see if the register is set in some insns and never
used since then. */
used since then. */
for (p = x /*NEXT_INSN (x) */ ; p; p = NEXT_INSN (p))
{
rtx body;
......@@ -2029,7 +2029,7 @@ dead_register_here (x, reg)
return 1;
}
/* Register is used (may be in source or in dest). */
/* Register is used (may be in source or in dest). */
if (reg_mentioned_p (reg, p)
|| (x_reg != 0 && GET_MODE (p) == SImode
&& reg_mentioned_p (x_reg, p)))
......@@ -2085,7 +2085,7 @@ asm_print_register (file, regno)
't' generate the temporary scratch register. The operand is
ignored.
'T' generate the low-part temporary scratch register. The operand is
ignored. */
ignored. */
void
print_operand (file, op, letter)
......@@ -2781,7 +2781,7 @@ m68hc11_emit_logical (mode, code, operands)
}
}
/* The logical operation is similar to a copy. */
/* The logical operation is similar to a copy. */
else if (need_copy)
{
rtx src;
......@@ -3063,7 +3063,7 @@ m68hc11_gen_movhi (insn, operands)
}
/* Some moves to a hard register are special. Not all of them
are really supported and we have to use a temporary
location to provide them (either the stack of a temp var). */
location to provide them (either the stack of a temp var). */
if (H_REG_P (operands[0]))
{
switch (REGNO (operands[0]))
......@@ -3093,7 +3093,7 @@ m68hc11_gen_movhi (insn, operands)
}
else
{
/* %t means *ZTMP scratch register. */
/* %t means *ZTMP scratch register. */
output_asm_insn ("sty\t%t1", operands);
output_asm_insn ("ldd\t%t1", operands);
}
......@@ -3339,7 +3339,7 @@ m68hc11_gen_movqi (insn, operands)
{
/* Move a register or memory to the same location.
This is possible because such insn can appear
in a non-optimizing mode. */
in a non-optimizing mode. */
if (operands[0] == operands[1] || rtx_equal_p (operands[0], operands[1]))
{
cc_status = cc_prev_status;
......@@ -3811,7 +3811,7 @@ m68hc11_notice_keep_cc (reg)
/* Machine Specific Reorg. */
/* Machine Specific Reorg. */
/* Z register replacement:
......@@ -3884,7 +3884,7 @@ int z_replacement_completed = 0;
/* Analyze the insn to find out which replacement register to use and
the boundaries of the replacement.
Returns 0 if we reached the last insn to be replaced, 1 if we can
continue replacement in next insns. */
continue replacement in next insns. */
static int
m68hc11_check_z_replacement (insn, info)
......@@ -4672,7 +4672,7 @@ m68hc11_z_replacement (insn)
fatal_insn ("Cannot do z-register replacement", insn);
}
/* Likewise for (REG:QI Z). */
/* Likewise for (REG:QI Z). */
if (reg_mentioned_p (z_reg, insn))
{
if (replace_reg_qi == NULL_RTX)
......@@ -4905,7 +4905,7 @@ m68hc11_reorg (first)
/* Cost functions. */
/* Cost of moving memory. */
/* Cost of moving memory. */
int
m68hc11_memory_move_cost (mode, class, in)
enum machine_mode mode;
......@@ -4962,7 +4962,7 @@ m68hc11_address_cost (addr)
switch (GET_CODE (addr))
{
case REG:
/* Make the cost of hard registers and specially SP, FP small. */
/* Make the cost of hard registers and specially SP, FP small. */
if (REGNO (addr) < FIRST_PSEUDO_REGISTER)
cost = 0;
else
......@@ -5205,7 +5205,7 @@ m68hc11_rtx_costs (x, code, outer_code)
/* print_options - called at the start of the code generation for a
module. */
module. */
extern char *asm_file_name;
......
gcc/config/m68hc11/m68hc11.md
......@@ -1092,7 +1092,7 @@
rtx push = m68hc11_gen_lowpart (HImode, low);
rtx src = operands[1];
/* Source operand must be in a hard register. */
/* Source operand must be in a hard register. */
if (!H_REG_P (src))
{
src = gen_rtx (REG, QImode, REGNO (operands[2]));
......@@ -1100,7 +1100,7 @@
}
/* Source is in D, we can push B then one word of 0 and we do
a correction on the stack pointer. */
a correction on the stack pointer. */
if (D_REG_P (src))
{
emit_move_insn (m68hc11_gen_lowpart (QImode, push), src);
......@@ -1150,7 +1150,7 @@
rtx low2 = m68hc11_gen_lowpart (HImode, low);
rtx src = operands[1];
/* Source operand must be in a hard register. */
/* Source operand must be in a hard register. */
if (!H_REG_P (src))
{
src = gen_rtx (REG, QImode, REGNO (operands[2]));
......@@ -1432,7 +1432,7 @@
else if (X_REG_P (operands[0]))
{
/* X can be used as an indexed addressing in the source.
Get the value before clearing it. */
Get the value before clearing it. */
if (reg_mentioned_p (ix_reg, operands[1]))
{
output_asm_insn (\"ldab\\t%b1\", operands);
......@@ -1599,7 +1599,7 @@
else
{
/* X can be used as a indexed addressing in the source.
Get the value before clearing it. */
Get the value before clearing it. */
x_reg_used = reg_mentioned_p (ix_reg, operands[1]);
if (x_reg_used)
{
......@@ -1812,7 +1812,7 @@
}
ops[2] = gen_label_rtx ();
/* ldx preserves the carry, propagate it by incrementing X directly. */
/* ldx preserves the carry, propagate it by incrementing X directly. */
output_asm_insn (\"addd\\t%0\", ops);
if (!X_REG_P (operands[2]))
output_asm_insn (\"ldx\\t%1\", ops);
......@@ -1886,7 +1886,7 @@
output_asm_insn (\"clra\", ops);
}
/* ldx preserves the carry, propagate it by incrementing X directly. */
/* ldx preserves the carry, propagate it by incrementing X directly. */
output_asm_insn (\"addb\\t%b0\", ops);
output_asm_insn (\"adca\\t%h1\", ops);
if (!X_REG_P (operands[2]))
......@@ -2200,7 +2200,7 @@
}
/* For X and Y increment, the flags are not complete. Only the Z flag
is updated. For SP increment, flags are not changed. */
is updated. For SP increment, flags are not changed. */
if (SP_REG_P (operands[0]))
{
cc_status = cc_prev_status;
......@@ -2328,7 +2328,7 @@
if (GET_CODE (operands[2]) != CONST_INT)
{
/* Adding to an address register or with another/same register
is not possible. This must be replaced. */
is not possible. This must be replaced. */
if (A_REG_P (operands[0]) || H_REG_P (operands[2]))
return \"#\";
......@@ -2679,20 +2679,20 @@
output_asm_insn (\"xgdx\", operands);
/* The status flags correspond to the addd. xgdx/y and tx/ys do not
modify the flags. */
modify the flags. */
output_asm_insn (\"txs\", operands);
return \"xgdx\";
}
/* Need to transfer to SP to X,Y and then to D register.
Register X,Y is lost, this is specified by the (clobber) statement. */
Register X,Y is lost, this is specified by the (clobber) statement. */
output_asm_insn (\"ts%3\", operands);
output_asm_insn (\"xgd%3\", operands);
output_asm_insn (\"subd\\t%2\", operands);
output_asm_insn (\"xgd%3\", operands);
/* The status flags correspond to the addd. xgdx/y and tx/ys do not
modify the flags. */
modify the flags. */
return \"t%3s\";
}")
......@@ -2705,7 +2705,7 @@
"*
{
/* Adding to an address register or with another/same register
is not possible. This must be replaced. */
is not possible. This must be replaced. */
if (A_REG_P (operands[0]) || H_REG_P (operands[2]))
return \"#\";
......@@ -3640,7 +3640,7 @@
(match_operand:HI 2 "general_operand" "dAuim")]))]
"z_replacement_completed == 2
/* If we are adding a small constant to X or Y, it's
better to use one or several inx/iny instructions. */
better to use one or several inx/iny instructions. */
&& !(GET_CODE (operands[3]) == PLUS
&& ((TARGET_M6812
&& (immediate_operand (operands[2], HImode)
......@@ -3656,7 +3656,7 @@
(parallel [(set (reg:HI D_REGNUM) (match_dup 0))
(set (match_dup 0) (reg:HI D_REGNUM))])]
"
/* Save the operand2 in a temporary location and use it. */
/* Save the operand2 in a temporary location and use it. */
if ((H_REG_P (operands[2])
|| reg_mentioned_p (operands[0], operands[2]))
&& !(SP_REG_P (operands[2]) && GET_CODE (operands[3]) == PLUS))
......@@ -3690,7 +3690,7 @@
(match_operand:HI 2 "general_operand" "dAuim")]))]
"z_replacement_completed == 2
/* If we are adding a small constant to X or Y, it's
better to use one or several inx/iny instructions. */
better to use one or several inx/iny instructions. */
&& !(GET_CODE (operands[3]) == PLUS
&& ((TARGET_M6812
&& (immediate_operand (operands[2], HImode)
......@@ -3764,17 +3764,17 @@
&& !rtx_equal_p (operands[0], operands[1]))
|| reg_mentioned_p (operands[0], operands[1]))
{
/* Move to the destination register, before the xgdx. */
/* Move to the destination register, before the xgdx. */
operands[4] = gen_rtx (REG, GET_MODE (operands[1]),
REGNO (operands[0]));
operands[5] = operands[1];
/* Apply the operation on D. */
/* Apply the operation on D. */
operands[3] = gen_rtx (REG, GET_MODE (operands[1]), HARD_D_REGNUM);
}
else
{
/* Generate a copy to same register (nop). */
/* Generate a copy to same register (nop). */
operands[4] = operands[5] = operands[0];
operands[3] = operands[1];
}
......@@ -3796,7 +3796,7 @@
(match_operand:QI 2 "general_operand" "dxyuim")]))]
"z_replacement_completed == 2
/* Reject a (plus:QI (reg:QI X) (const_int 1|-1)) because the
incqi pattern generates a better code. */
incqi pattern generates a better code. */
&& !(GET_CODE (operands[3]) == PLUS
&& GET_CODE (operands[2]) == CONST_INT
&& (INTVAL (operands[2]) == 1 || INTVAL (operands[2]) == -1))"
......@@ -3812,7 +3812,7 @@
register appears in the source, we have to save the operand[2]
value in a temporary location and then use that temp.
Otherwise, it's ok and we generate a (set (D) (D)) that
will result in a nop. */
will result in a nop. */
if (H_REG_P (operands[2]))
{
operands[5] = gen_rtx (REG, HImode, SOFT_TMP_REGNUM);
......@@ -3892,11 +3892,11 @@
&& !rtx_equal_p (operands[0], operands[1]))
|| reg_mentioned_p (operands[0], operands[1]))
{
/* Move to the destination register, before the xgdx. */
/* Move to the destination register, before the xgdx. */
operands[4] = operands[0];
operands[5] = operands[1];
/* Apply the operation on D. */
/* Apply the operation on D. */
operands[6] = gen_rtx (REG, QImode, HARD_D_REGNUM);
}
else
......@@ -4009,7 +4009,7 @@
"
{
/* The result pattern only works for D register.
Generate 2 one_cmplhi2 instructions. */
Generate 2 one_cmplhi2 instructions. */
if (!D_REG_P (operands[0]))
{
rtx ops[2];
......@@ -4614,7 +4614,7 @@
output_asm_insn (\"clrb\", operands);
output_asm_insn (\"rola\", operands);
/* Clear A without clearing the carry flag. */
/* Clear A without clearing the carry flag. */
output_asm_insn (\"tba\", operands);
output_asm_insn (\"bcc\\t%l0\", ops);
output_asm_insn (\"coma\", operands);
......@@ -4645,7 +4645,7 @@
output_asm_insn (\"asrb\", operands);
val--;
}
/* Status is ok. */
/* Status is ok. */
return \"\";
}
if (val == 7)
......
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