mips.h (ASM_SPEC): Don't pass -G to the assembler when -membedded-pic is passed.

* config/mips/mips.h (ASM_SPEC): Don't pass -G to the assembler
when -membedded-pic is passed.

* config/mips/mips.md (casesi): Handle 64-bit case too.
(casesi_internal_di): New insn.

* config/mips/mips.c (embedded_pic_offset): Always make the
embedded-pic subtractions relative to the name of the current
function by use of the magic string "..CURRENT_FUNCTION".
* config/mips/mips.h (ASM_OUTPUT_LABELREF): Make the magic happen.

From-SVN: r30649

gcc/ChangeLog

+Wed Nov 24 17:26:05 1999  Geoffrey Keating  <geoffk@cygnus.com>
+
+	* config/mips/mips.h (ASM_SPEC): Don't pass -G to the assembler
+	when -membedded-pic is passed.
+
+	* config/mips/mips.md (casesi): Handle 64-bit case too.
+	(casesi_internal_di): New insn.
+
+	* config/mips/mips.c (embedded_pic_offset): Always make the
+	embedded-pic subtractions relative to the name of the current
+	function by use of the magic string "..CURRENT_FUNCTION".
+	* config/mips/mips.h (ASM_OUTPUT_LABELREF): Make the magic happen.
+
 1999-11-24  Geoffrey Keating  <geoffk@cygnus.com>
 
 	* config/mips/mips.md (div_trap_normal): Don't ask for the REGNO

gcc/config/mips/mips.h

@@ -807,7 +807,7 @@ while (0)
 /* ASM_SPEC is the set of arguments to pass to the assembler.  */
 
 #define ASM_SPEC "\
-%{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} %{mips4} \
+%{!membedded-pic:%{G*}} %{EB} %{EL} %{mips1} %{mips2} %{mips3} %{mips4} \
 %{mips16:%{!mno-mips16:-mips16}} %{mno-mips16:-no-mips16} \
 %(subtarget_asm_optimizing_spec) \
 %(subtarget_asm_debugging_spec) \
@@ -3210,6 +3210,16 @@ do									\
   }									\
 while (0)
 
+/* This handles the magic '..CURRENT_FUNCTION' symbol, which means
+   'the start of the function that this code is output in'.  */
+
+#define ASM_OUTPUT_LABELREF(FILE,NAME)  \
+  if (strcmp (NAME, "..CURRENT_FUNCTION") == 0)				\
+    asm_fprintf ((FILE), "%U%s",					\
+		 XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));	\
+  else									\
+    asm_fprintf ((FILE), "%U%s", (NAME))
+
 /* The mips16 wants the constant pool to be after the function,
    because the PC relative load instructions use unsigned offsets.  */
 

gcc/config/mips/mips.md

@@ -9217,10 +9217,6 @@ move\\t%0,%z4\\n\\
   "TARGET_EMBEDDED_PIC"
   "
 {
-  /* We need slightly different code for eight byte table entries.  */
-  if (Pmode == DImode)
-    abort ();
-
   if (operands[0])
     {
       rtx reg = gen_reg_rtx (SImode);
@@ -9231,8 +9227,12 @@ move\\t%0,%z4\\n\\
       emit_insn (gen_bgtu (operands[4]));
 
       /* Do the PIC jump.  */
-      emit_jump_insn (gen_casesi_internal (reg, operands[3],
-					   gen_reg_rtx (SImode)));
+      if (Pmode != DImode)
+        emit_jump_insn (gen_casesi_internal (reg, operands[3], 
+					     gen_reg_rtx (SImode)));
+      else
+        emit_jump_insn (gen_casesi_internal_di (reg, operands[3], 
+						gen_reg_rtx (DImode)));
 
       DONE;
     }
@@ -9265,6 +9265,21 @@ lw\\t%2,%1-%S1(%2)\;addu\\t%2,%2,$31\;j\\t%2"
    (set_attr "mode"	"none")
    (set_attr "length"	"24")])
 
+(define_insn "casesi_internal_di"
+  [(set (pc)
+	(mem:DI (plus:DI (sign_extend:DI 
+			  (mult:SI (match_operand:SI 0 "register_operand" "d")
+				  (const_int 4))
+			 (label_ref (match_operand 1 "" "")))))
+   (clobber (match_operand:DI 2 "register_operand" "=d"))
+   (clobber (reg:DI 31))]
+  "TARGET_EMBEDDED_PIC"
+  "%(bal\\t%S1\;sll\\t%2,%0,2\\n%~%S1:\;addu\\t%2,%2,$31%)\;\\
+ld\\t%2,%1-%S1(%2)\;daddu\\t%2,%2,$31\;j\\t%2"
+  [(set_attr "type"	"jump")
+   (set_attr "mode"	"none")
+   (set_attr "length"	"24")])
+
 ;; For o32/n32/n64, we save the gp in the jmp_buf as well.  While it is
 ;; possible to either pull it off the stack (in the o32 case) or recalculate
 ;; it given t9 and our target label, it takes 3 or 4 insns to do so, and