Commit 9c9a11f6 by Uros Bizjak Committed by Uros Bizjak

i386.c (ix86_legitimate_combined_insn): Do not call recog here.

	* config/i386/i386.c (ix86_legitimate_combined_insn): Do not
	call recog here.  Assert that INSN_CODE (insn) is non-negative.

From-SVN: r244478
parent 81e63b63
2017-01-15 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.c (ix86_legitimate_combined_insn): Do not
call recog here. Assert that INSN_CODE (insn) is non-negative.
2017-01-15 Segher Boessenkool <segher@kernel.crashing.org>
PR target/72749
......
......@@ -8125,73 +8125,73 @@ ix86_return_pops_args (tree fundecl, tree funtype, int size)
static bool
ix86_legitimate_combined_insn (rtx_insn *insn)
{
int i;
/* Check operand constraints in case hard registers were propagated
into insn pattern. This check prevents combine pass from
generating insn patterns with invalid hard register operands.
These invalid insns can eventually confuse reload to error out
with a spill failure. See also PRs 46829 and 46843. */
if ((INSN_CODE (insn) = recog (PATTERN (insn), insn, 0)) >= 0)
{
int i;
extract_insn (insn);
preprocess_constraints (insn);
gcc_assert (INSN_CODE (insn) >= 0);
int n_operands = recog_data.n_operands;
int n_alternatives = recog_data.n_alternatives;
for (i = 0; i < n_operands; i++)
{
rtx op = recog_data.operand[i];
machine_mode mode = GET_MODE (op);
const operand_alternative *op_alt;
int offset = 0;
bool win;
int j;
extract_insn (insn);
preprocess_constraints (insn);
/* A unary operator may be accepted by the predicate, but it
is irrelevant for matching constraints. */
if (UNARY_P (op))
op = XEXP (op, 0);
int n_operands = recog_data.n_operands;
int n_alternatives = recog_data.n_alternatives;
for (i = 0; i < n_operands; i++)
{
rtx op = recog_data.operand[i];
machine_mode mode = GET_MODE (op);
const operand_alternative *op_alt;
int offset = 0;
bool win;
int j;
if (SUBREG_P (op))
{
if (REG_P (SUBREG_REG (op))
&& REGNO (SUBREG_REG (op)) < FIRST_PSEUDO_REGISTER)
offset = subreg_regno_offset (REGNO (SUBREG_REG (op)),
GET_MODE (SUBREG_REG (op)),
SUBREG_BYTE (op),
GET_MODE (op));
op = SUBREG_REG (op);
}
/* A unary operator may be accepted by the predicate, but it
is irrelevant for matching constraints. */
if (UNARY_P (op))
op = XEXP (op, 0);
if (!(REG_P (op) && HARD_REGISTER_P (op)))
continue;
if (SUBREG_P (op))
{
if (REG_P (SUBREG_REG (op))
&& REGNO (SUBREG_REG (op)) < FIRST_PSEUDO_REGISTER)
offset = subreg_regno_offset (REGNO (SUBREG_REG (op)),
GET_MODE (SUBREG_REG (op)),
SUBREG_BYTE (op),
GET_MODE (op));
op = SUBREG_REG (op);
}
op_alt = recog_op_alt;
if (!(REG_P (op) && HARD_REGISTER_P (op)))
continue;
/* Operand has no constraints, anything is OK. */
win = !n_alternatives;
op_alt = recog_op_alt;
alternative_mask preferred = get_preferred_alternatives (insn);
for (j = 0; j < n_alternatives; j++, op_alt += n_operands)
{
if (!TEST_BIT (preferred, j))
continue;
if (op_alt[i].anything_ok
|| (op_alt[i].matches != -1
&& operands_match_p
(recog_data.operand[i],
recog_data.operand[op_alt[i].matches]))
|| reg_fits_class_p (op, op_alt[i].cl, offset, mode))
{
win = true;
break;
}
}
/* Operand has no constraints, anything is OK. */
win = !n_alternatives;
if (!win)
return false;
alternative_mask preferred = get_preferred_alternatives (insn);
for (j = 0; j < n_alternatives; j++, op_alt += n_operands)
{
if (!TEST_BIT (preferred, j))
continue;
if (op_alt[i].anything_ok
|| (op_alt[i].matches != -1
&& operands_match_p
(recog_data.operand[i],
recog_data.operand[op_alt[i].matches]))
|| reg_fits_class_p (op, op_alt[i].cl, offset, mode))
{
win = true;
break;
}
}
if (!win)
return false;
}
return true;
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