arc: Use accl_operand predicate for fma instructions.

With the refurbish of ARC600' accumulator support, the mlo_operand
doesn't reflect the proper low accumulator register for the newer
ARCv2 accumulator register used by the fma instructions.  Hence,
replace it with accl_operand predicate.

gcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
	(fnmasf4_fpu): Likewise.

gcc/ChangeLog

 2020-03-03  Claudiu Zissulescu  <claziss@synopsys.com>
 
+	* config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
+	(fnmasf4_fpu): Likewise.
+
+2020-03-03  Claudiu Zissulescu  <claziss@synopsys.com>
+
 	* config/arc/arc.md (adddi3): Early expand the 64bit operation into
 	32bit ops.
 	(subdi3): Likewise.

gcc/config/arc/fpu.md

@@ -89,7 +89,7 @@
   [(set (match_operand:SF 0 "register_operand"          "=r,r,r,r,r")
 	(fma:SF (match_operand:SF 1 "nonmemory_operand" "%0,r,0,r,F")
 		(match_operand:SF 2 "nonmemory_operand"  "r,r,F,F,r")
-		(match_operand:SF 3 "mlo_operand" "")))]
+		(match_operand:SF 3 "accl_operand" "")))]
   "TARGET_FP_SP_FUSED
    && (register_operand (operands[1], SFmode)
        || register_operand (operands[2], SFmode))"
@@ -104,7 +104,7 @@
   [(set (match_operand:SF 0 "register_operand"                  "=r,r,r,r,r")
 	(fma:SF (neg:SF (match_operand:SF 1 "nonmemory_operand" "%0,r,0,r,F"))
 		(match_operand:SF 2 "nonmemory_operand"          "r,r,F,F,r")
-		(match_operand:SF 3 "mlo_operand" "")))]
+		(match_operand:SF 3 "accl_operand" "")))]
   "TARGET_FP_SP_FUSED
    && (register_operand (operands[1], SFmode)
        || register_operand (operands[2], SFmode))"