Commit 9b5effa4 by H.J. Lu

Use unspec_volatile on rdrand<mode>_1

gcc/

	PR target/53416
	* config/i386/i386.md (UNSPEC_RDRAND): Renamed to ...
	(UNSPECV_RDRAND): This.
	(rdrand<mode>_1): Updated.

gcc/testsuite/

	PR target/53416
	* gcc.target/i386/pr53416.c: New file.

From-SVN: r187709
parent 47fb0e18
2012-05-21 H.J. Lu <hongjiu.lu@intel.com>
PR target/53416
* config/i386/i386.md (UNSPEC_RDRAND): Renamed to ...
(UNSPECV_RDRAND): This.
(rdrand<mode>_1): Updated.
2012-05-21 Richard Guenther <rguenther@suse.de> 2012-05-21 Richard Guenther <rguenther@suse.de>
* tree-loop-distribution.c (can_generate_builtin): Reject * tree-loop-distribution.c (can_generate_builtin): Reject
......
...@@ -176,9 +176,6 @@ ...@@ -176,9 +176,6 @@
;; For CRC32 support ;; For CRC32 support
UNSPEC_CRC32 UNSPEC_CRC32
;; For RDRAND support
UNSPEC_RDRAND
;; For BMI support ;; For BMI support
UNSPEC_BEXTR UNSPEC_BEXTR
...@@ -208,6 +205,9 @@ ...@@ -208,6 +205,9 @@
UNSPECV_WRFSBASE UNSPECV_WRFSBASE
UNSPECV_WRGSBASE UNSPECV_WRGSBASE
;; For RDRAND support
UNSPECV_RDRAND
;; For RTM support ;; For RTM support
UNSPECV_XBEGIN UNSPECV_XBEGIN
UNSPECV_XEND UNSPECV_XEND
...@@ -18403,9 +18403,9 @@ ...@@ -18403,9 +18403,9 @@
(define_insn "rdrand<mode>_1" (define_insn "rdrand<mode>_1"
[(set (match_operand:SWI248 0 "register_operand" "=r") [(set (match_operand:SWI248 0 "register_operand" "=r")
(unspec:SWI248 [(const_int 0)] UNSPEC_RDRAND)) (unspec_volatile:SWI248 [(const_int 0)] UNSPECV_RDRAND))
(set (reg:CCC FLAGS_REG) (set (reg:CCC FLAGS_REG)
(unspec:CCC [(const_int 0)] UNSPEC_RDRAND))] (unspec_volatile:CCC [(const_int 0)] UNSPECV_RDRAND))]
"TARGET_RDRND" "TARGET_RDRND"
"rdrand\t%0" "rdrand\t%0"
[(set_attr "type" "other") [(set_attr "type" "other")
......
2012-05-21 Uros Bizjak <ubizjak@gmail.com>
H.J. Lu <hongjiu.lu@intel.com>
PR target/53416
* gcc.target/i386/pr53416.c: New file.
2012-05-21 Richard Guenther <rguenther@suse.de> 2012-05-21 Richard Guenther <rguenther@suse.de>
* gfortran.dg/pr46519-2.f90: Adjust to avoid memset transform. * gfortran.dg/pr46519-2.f90: Adjust to avoid memset transform.
......
/* PR target/53416 */
/* { dg-options "-O2 -mrdrnd" } */
int test (void)
{
unsigned int number = 0;
int result0, result1, result2, result3;
result0 = __builtin_ia32_rdrand32_step (&number);
result1 = __builtin_ia32_rdrand32_step (&number);
result2 = __builtin_ia32_rdrand32_step (&number);
result3 = __builtin_ia32_rdrand32_step (&number);
return result0 + result1 +result2 + result3;
}
/* { dg-final { scan-assembler-times "rdrand" 4 } } */
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