Commit 9b0f04e7 by Andrey Belevantsev Committed by Andrey Belevantsev

re PR rtl-optimization/45352 (ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7058)

        PR rtl-optimization/45352
        * sel-sched.c: Update copyright years.
        (reset_sched_cycles_in_current_ebb): Also recheck the DFA state
        in the advancing loop when we have issued issue_rate insns.

	* gcc.dg/pr45352-3.c: New.

From-SVN: r168742
parent 1ee3ea05
2011-01-13 Andrey Belevantsev <abel@ispras.ru>
PR rtl-optimization/45352
* sel-sched.c: Update copyright years.
(reset_sched_cycles_in_current_ebb): Also recheck the DFA state
in the advancing loop when we have issued issue_rate insns.
2011-01-12 Richard Henderson <rth@redhat.com> 2011-01-12 Richard Henderson <rth@redhat.com>
* config/mn10300/mn10300.c (mn10300_md_asm_clobbers): New. * config/mn10300/mn10300.c (mn10300_md_asm_clobbers): New.
......
/* Instruction scheduling pass. Selective scheduler and pipeliner. /* Instruction scheduling pass. Selective scheduler and pipeliner.
Copyright (C) 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. Copyright (C) 2006, 2007, 2008, 2009, 2010, 2011
Free Software Foundation, Inc.
This file is part of GCC. This file is part of GCC.
...@@ -6988,7 +6989,7 @@ reset_sched_cycles_in_current_ebb (void) ...@@ -6988,7 +6989,7 @@ reset_sched_cycles_in_current_ebb (void)
{ {
int cost, haifa_cost; int cost, haifa_cost;
int sort_p; int sort_p;
bool asm_p, real_insn, after_stall; bool asm_p, real_insn, after_stall, all_issued;
int clock; int clock;
if (!INSN_P (insn)) if (!INSN_P (insn))
...@@ -7024,8 +7025,8 @@ reset_sched_cycles_in_current_ebb (void) ...@@ -7024,8 +7025,8 @@ reset_sched_cycles_in_current_ebb (void)
haifa_cost = cost; haifa_cost = cost;
after_stall = 1; after_stall = 1;
} }
if (haifa_cost == 0 all_issued = issued_insns == issue_rate;
&& issued_insns == issue_rate) if (haifa_cost == 0 && all_issued)
haifa_cost = 1; haifa_cost = 1;
if (haifa_cost > 0) if (haifa_cost > 0)
{ {
...@@ -7053,11 +7054,12 @@ reset_sched_cycles_in_current_ebb (void) ...@@ -7053,11 +7054,12 @@ reset_sched_cycles_in_current_ebb (void)
break; break;
/* When the data dependency stall is longer than the DFA stall, /* When the data dependency stall is longer than the DFA stall,
it could be that after the longer stall the insn will again and when we have issued exactly issue_rate insns and stalled,
it could be that after this longer stall the insn will again
become unavailable to the DFA restrictions. Looks strange become unavailable to the DFA restrictions. Looks strange
but happens e.g. on x86-64. So recheck DFA on the last but happens e.g. on x86-64. So recheck DFA on the last
iteration. */ iteration. */
if (after_stall if ((after_stall || all_issued)
&& real_insn && real_insn
&& haifa_cost == 0) && haifa_cost == 0)
haifa_cost = estimate_insn_cost (insn, curr_state); haifa_cost = estimate_insn_cost (insn, curr_state);
......
2011-01-13 Andrey Belevantsev <abel@ispras.ru>
PR rtl-optimization/45352
* gcc.dg/pr45352-3.c: New.
2011-01-12 Rodrigo Rivas Costa <rodrigorivascosta@gmail.com> 2011-01-12 Rodrigo Rivas Costa <rodrigorivascosta@gmail.com>
* g++.dg/cpp0x/range-for4.C: Delete useless include and duplicated * g++.dg/cpp0x/range-for4.C: Delete useless include and duplicated
......
/* { dg-do compile { target powerpc*-*-* ia64-*-* x86_64-*-* } } */
/* { dg-options "-O -fprofile-generate -fgcse -fno-gcse-lm -fgcse-sm -fno-ivopts -fno-tree-loop-im -ftree-pre -funroll-loops -fno-web -fschedule-insns2 -fselective-scheduling2 -fsel-sched-pipelining" } */
extern volatile float f[];
void foo (void)
{
int i;
for (i = 0; i < 100; i++)
f[i] = 0;
for (i = 0; i < 100; i++)
f[i] = 0;
for (i = 0; i < 100; i++)
if (f[i])
__builtin_abort ();
}
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