Commit 99fc2502 by Chen Liqin Committed by Chen Liqin

t-score-elf (MULTILIB_OPTIONS): Change.

	* config/score/t-score-elf (MULTILIB_OPTIONS): Change.
	* config/score/predicates.md (const_uimm5, sr0_operand, const_simm12,
	const_simm15, const_pow2, const_npow2): Added.
	* config/score/misc.md (insv, extv, extzv, movmemsi, 
	move_lbu_a/b, mov_lhu_a/b etc): Added and fix some bug.
	* config/score/score.c (score_address_cost, score_select_cc_mode): 
	Added.
	Change CONST_OK_FOR_LETTER_P/EXTRA_CONSTRAINT define.
	Update score_rtx_costs for MACRO TARGET_RTX_COSTS.
	Update score_print_operand.
	* config/score/score.h (DATA_ALIGNMENT, SELECT_CC_MODE): Added.
	Adjust register allocate order and update some macro define.
	* config/score/score-mdaux.c (mdx_unaligned_load, mdx_unsigned_store,
	mdx_block_move_straight, mdx_block_move_loop_head,
	mdx_block_move_loop_body, mdx_block_move_loop_foot, mdx_block_move_loop,
	mdx_block_move): Added.
	(mdx_movsicc, mdp_select_add_imm, mdp_select, mds_zero_extract_andi,
	mdp_limm): Updated and fix some bug and typo.
	* config/score/score.md (movqi/hi/si, add/sub/zero/ext): Updated.
	(movsf, movdf, doloop_end): Added.

From-SVN: r120570
parent 0979f01d
2007-01-08 Chen Liqin <liqin@sunnorth.com.cn>
* config/score/t-score-elf (MULTILIB_OPTIONS): Change.
* config/score/predicates.md (const_uimm5, sr0_operand, const_simm12,
const_simm15, const_pow2, const_npow2): Added.
* config/score/misc.md (insv, extv, extzv, movmemsi,
move_lbu_a/b, mov_lhu_a/b etc): Added and fix some bug.
* config/score/score.c (score_address_cost, score_select_cc_mode):
Added.
Change CONST_OK_FOR_LETTER_P/EXTRA_CONSTRAINT define.
Update score_rtx_costs for MACRO TARGET_RTX_COSTS.
Update score_print_operand.
* config/score/score.h (DATA_ALIGNMENT, SELECT_CC_MODE): Added.
Adjust register allocate order and update some macro define.
* config/score/score-mdaux.c (mdx_unaligned_load, mdx_unsigned_store,
mdx_block_move_straight, mdx_block_move_loop_head,
mdx_block_move_loop_body, mdx_block_move_loop_foot, mdx_block_move_loop,
mdx_block_move): Added.
(mdx_movsicc, mdp_select_add_imm, mdp_select, mds_zero_extract_andi,
mdp_limm): Updated and fix some bug and typo.
* config/score/score.md (movqi/hi/si, add/sub/zero/ext): Updated.
(movsf, movdf, doloop_end): Added.
2007-01-08 Kazu Hirata <kazu@codesourcery.com>
* config/arm/arm.c, config/arm/arm.h, config/arm/arm.md,
......
......@@ -43,8 +43,8 @@
.mask 0x00000000, 0
_start:
la r28, _gp
la r8, __bss_start
la r9, __bss_end__
la r8, _bss_start
la r9, _bss_end__
sub! r9, r8
srli! r9, 2
addi r9, -1
......@@ -91,8 +91,8 @@ _fini:
.mask 0x00000000,0
_start:
la r28, _gp
la r8, __bss_start
la r9, __bss_end__
la r8, _bss_start
la r9, _bss_end__
sub! r9, r8
srli! r9, 2
addi r9, -1
......@@ -102,15 +102,10 @@ _start:
sw r9, [r8]+, 4
bcnz 1b
la r0, _stack
# jl _init
# la r4, _end
# jl _init_argv
ldiu! r4, 0
ldiu! r5, 0
# jl main
la r29, main
brl r29
# jl exit
la r29, exit
brl r29
.end _start
......
......@@ -59,4 +59,3 @@
br r3
#endif
......@@ -242,7 +242,7 @@ _flush_cache:
#nop!
addi r8, 16
bcnz 2b
.cprestore 12 # pic used
.cprestore r0, 12 # pic used
addi r0, 8 # pic used
br r3
#endif
......@@ -278,7 +278,7 @@ __mulsi3_loop2:
cmpi.c a1, 0
bne __mulsi3_loop
mv r4, t1
.cprestore 12 # pic used
.cprestore r0, 12 # pic used
addi r0, 8 # pic used
br ra
.end __mulsi3
......@@ -334,7 +334,7 @@ __uds_loop3:
__uds_exit:
mv a1, a0
mv r4, t4
.cprestore 12 # pic used
.cprestore r0, 12 # pic used
addi r0, 8 # pic used
br ra
.end __udivsi3
......@@ -350,7 +350,7 @@ __umodsi3:
la r29, __udivsi3
brl r29
mv r4, a1
.cprestore 12 # pic used
.cprestore r0, 12 # pic used
addi r0, 8 # pic used
br t3
.end __umodsi3
......@@ -383,7 +383,7 @@ __divsi3_adjust:
bge __divsi3_exit
neg r4, r4
__divsi3_exit:
.cprestore 12 # pic used
.cprestore r0, 12 # pic used
addi r0, 8 # pic used
br t3
.end __divsi3
......
......@@ -35,13 +35,11 @@
(ior (match_operand 0 "const_call_insn_operand")
(match_operand 0 "register_operand")))
(define_predicate "const_bi_operand"
(and (match_code "const_int")
(match_test "CONST_OK_FOR_LETTER_P (INTVAL (op), 'J')")))
(define_predicate "pindex_off_operand"
(and (match_code "const_int")
(match_test "CONST_OK_FOR_LETTER_P (INTVAL (op), 'P')")))
(define_predicate "const_uimm5"
(match_code "const_int")
{
return IMM_IN_RANGE (INTVAL (op), 5, 0);
})
(define_predicate "hireg_operand"
(and (match_code "reg")
......@@ -51,6 +49,10 @@
(and (match_code "reg")
(match_test "REGNO (op) == LO_REGNUM")))
(define_predicate "sr0_operand"
(and (match_code "reg")
(match_test "REGNO (op) == CN_REGNUM")))
(define_predicate "g32reg_operand"
(and (match_code "reg")
(match_test "GP_REG_P (REGNO (op))")))
......@@ -61,3 +63,26 @@
(define_predicate "branch_nz_operator"
(match_code "eq,ne,lt,ge"))
(define_predicate "const_simm12"
(match_code "const_int")
{
return IMM_IN_RANGE (INTVAL (op), 12, 1);
})
(define_predicate "const_simm15"
(match_code "const_int")
{
return IMM_IN_RANGE (INTVAL (op), 15, 1);
})
(define_predicate "const_pow2"
(match_code "const_int")
{
return IMM_IS_POW_OF_2 ((unsigned HOST_WIDE_INT) INTVAL (op), 0, 31);
})
(define_predicate "const_npow2"
(match_code "const_int")
{
return IMM_IS_POW_OF_2 (~(unsigned HOST_WIDE_INT) INTVAL (op), 0, 31);
})
......@@ -45,7 +45,7 @@ extern int target_flags;
#define CE_REG_P(REGNO) REG_CONTAIN (REGNO, CE_REG_FIRST, CE_REG_NUM)
#define UIMM_IN_RANGE(V, W) ((V) >= 0 && (V) < ((HOST_WIDE_INT)1 << (W)))
#define UIMM_IN_RANGE(V, W) ((V) >= 0 && (V) < ((HOST_WIDE_INT) 1 << (W)))
#define SIMM_IN_RANGE(V, W) \
((V) >= (-1 * ((HOST_WIDE_INT) 1 << ((W) - 1))) \
......@@ -54,6 +54,11 @@ extern int target_flags;
#define IMM_IN_RANGE(V, W, S) \
((S) ? SIMM_IN_RANGE (V, W) : UIMM_IN_RANGE (V, W))
#define IMM_IS_POW_OF_2(V, E1, E2) \
((V) >= ((unsigned HOST_WIDE_INT) 1 << (E1)) \
&& (V) <= ((unsigned HOST_WIDE_INT) 1 << (E2)) \
&& ((V) & ((V) - 1)) == 0)
#define SCORE_STACK_ALIGN(LOC) (((LOC) + 3) & ~3)
#define SCORE_MAX_FIRST_STACK_STEP (0x3ff0)
......
......@@ -69,8 +69,6 @@ void mda_gen_cmp (enum machine_mode mode);
int mda_symbolic_constant_p (rtx x, enum score_symbol_type *symbol_type);
bool mda_pindex_mem (rtx addr);
int mda_bp (void);
/* Machine Expand. */
......@@ -87,8 +85,6 @@ void mdx_call_value (rtx *ops, bool sibcall);
/* Machine Split. */
void mds_movdi (rtx *ops);
void mds_addsi (rtx *ops);
void mds_zero_extract_andi (rtx *ops);
/* Machine Print. */
......@@ -100,14 +96,21 @@ const char * mdp_linsn (rtx *ops, enum mda_mem_unit unit, bool sign);
const char * mdp_sinsn (rtx *ops, enum mda_mem_unit unit);
const char * mdp_add_imm_ucc (rtx *ops);
const char * mdp_select_add_imm (rtx *ops, bool set_cc);
const char * mdp_select (rtx *ops, const char *inst_pre,
bool comu, const char *let);
bool commu, const char *letter, bool set_cc);
const char * mdp_limm (rtx *ops);
const char * mdp_move (rtx *ops);
/* Machine unaligned memory load/store. */
bool mdx_unaligned_load (rtx* ops);
bool mdx_unaligned_store (rtx* ops);
bool mdx_block_move (rtx* ops);
#endif
......@@ -21,6 +21,5 @@
/* CC_NZmode should be used if the N (sign) and Z (zero) flag is set correctly.
CC_Nmode should be used if only the N flag is set correctly. */
CC_MODE (CC_NZ);
CC_MODE (CC_N);
CC_MODE (CC_NZ);
......@@ -36,7 +36,7 @@ enum reg_class score_preferred_reload_class (rtx x, enum reg_class class);
enum reg_class score_secondary_reload_class (enum reg_class class,
enum machine_mode mode, rtx x);
int score_const_ok_for_letter_p (int value, char c);
int score_const_ok_for_letter_p (HOST_WIDE_INT value, char c);
int score_extra_constraint (rtx op, char c);
......
......@@ -18,4 +18,4 @@
the Free Software Foundation, 51 Franklin Street, Fifth Floor,
Boston, MA 02110-1301, USA. */
#define SCORE_GCC_VERSION "1.1"
#define SCORE_GCC_VERSION "1.2"
......@@ -35,7 +35,7 @@ dp-bit.c: $(srcdir)/config/fp-bit.c
# without the $gp register.
TARGET_LIBGCC2_CFLAGS = -G 0
MULTILIB_OPTIONS = fPIC mel mscore7
MULTILIB_OPTIONS = mmac mel fPIC
MULTILIB_MATCHES = fPIC=fpic
EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crti.o crtn.o
......@@ -43,4 +43,3 @@ EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crti.o crtn.o
LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment