Commit 9919f5fe by Uros Bizjak Committed by Uros Bizjak

i386.md (and<mode>3): Generate zero-extends for TARGET_ZERO_EXTEND_WITH_AND &&...

	* config/i386/i386.md (and<mode>3): Generate zero-extends for
	TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun))
	only.
	(*anddi3_doubleword): Split before reload. Merge with
	anddi->zext pre-reload splitter.
	(*andndi3_doubleword): Split before reload.
	(*<code>di3_doubleword): Ditto.
	(*one_cmpldi2_doubleword): Ditto.

From-SVN: r272323
parent 211b7533
2019-06-15 Uroš Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (and<mode>3): Generate zero-extends for
TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun))
only.
(*anddi3_doubleword): Split before reload. Merge with
anddi->zext pre-reload splitter.
(*andndi3_doubleword): Split before reload.
(*<code>di3_doubleword): Ditto.
(*one_cmpldi2_doubleword): Ditto.
2019-06-15 Jakub Jelinek <jakub@redhat.com> 2019-06-15 Jakub Jelinek <jakub@redhat.com>
PR middle-end/90779 PR middle-end/90779
......
...@@ -8365,7 +8365,10 @@ ...@@ -8365,7 +8365,10 @@
if (<MODE>mode == DImode && !TARGET_64BIT) if (<MODE>mode == DImode && !TARGET_64BIT)
; ;
else if (CONST_INT_P (operands[2]) && REG_P (operands[0])) else if (const_int_operand (operands[2], <MODE>mode)
&& register_operand (operands[0], <MODE>mode)
&& !(TARGET_ZERO_EXTEND_WITH_AND
&& optimize_function_for_speed_p (cfun)))
{ {
unsigned HOST_WIDE_INT ival = UINTVAL (operands[2]); unsigned HOST_WIDE_INT ival = UINTVAL (operands[2]);
...@@ -8388,68 +8391,34 @@ ...@@ -8388,68 +8391,34 @@
}) })
(define_insn_and_split "*anddi3_doubleword" (define_insn_and_split "*anddi3_doubleword"
[(set (match_operand:DI 0 "nonimmediate_operand" "=r,rm,r") [(set (match_operand:DI 0 "nonimmediate_operand")
(and:DI
(match_operand:DI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:DI 2 "x86_64_szext_general_operand" "Z,re,rm")))
(clobber (reg:CC FLAGS_REG))]
"!TARGET_64BIT && TARGET_STV && TARGET_SSE2
&& ix86_binary_operator_ok (AND, DImode, operands)"
"#"
"&& reload_completed"
[(const_int 0)]
{
split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);
if (operands[2] == const0_rtx)
{
operands[1] = const0_rtx;
ix86_expand_move (SImode, &operands[0]);
}
else if (operands[2] != constm1_rtx)
ix86_expand_binary_operator (AND, SImode, &operands[0]);
else if (operands[5] == constm1_rtx)
emit_note (NOTE_INSN_DELETED);
if (operands[5] == const0_rtx)
{
operands[4] = const0_rtx;
ix86_expand_move (SImode, &operands[3]);
}
else if (operands[5] != constm1_rtx)
ix86_expand_binary_operator (AND, SImode, &operands[3]);
DONE;
})
(define_split
[(set (match_operand:DI 0 "register_operand")
(and:DI (and:DI
(match_operand:DI 1 "nonimmediate_operand") (match_operand:DI 1 "nonimmediate_operand")
(match_operand:DI 2 "const_int_operand"))) (match_operand:DI 2 "x86_64_szext_general_operand")))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"!TARGET_64BIT && TARGET_STV && TARGET_SSE2 "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
&& ix86_binary_operator_ok (AND, DImode, operands)
&& can_create_pseudo_p ()" && can_create_pseudo_p ()"
"#"
"&& 1"
[(const_int 0)] [(const_int 0)]
{ {
unsigned HOST_WIDE_INT ival = UINTVAL (operands[2]);
machine_mode mode;
if (ival == GET_MODE_MASK (SImode))
mode = SImode;
else if (ival == GET_MODE_MASK (HImode))
mode = HImode;
else if (ival == GET_MODE_MASK (QImode))
mode = QImode;
else
FAIL;
split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]); split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);
if (mode == SImode) if (operands[2] == const0_rtx)
emit_move_insn (operands[0], const0_rtx);
else if (operands[2] == constm1_rtx)
emit_move_insn (operands[0], operands[1]); emit_move_insn (operands[0], operands[1]);
else else
emit_insn (gen_extend_insn emit_insn (gen_andsi3 (operands[0], operands[1], operands[2]));
(operands[0], gen_lowpart (mode, operands[1]),
SImode, mode, 1)); if (operands[5] == const0_rtx)
emit_move_insn (operands[3], const0_rtx); emit_move_insn (operands[3], const0_rtx);
else if (operands[5] == constm1_rtx)
emit_move_insn (operands[3], operands[4]);
else
emit_insn (gen_andsi3 (operands[3], operands[4], operands[5]));
DONE; DONE;
}) })
...@@ -8886,14 +8855,14 @@ ...@@ -8886,14 +8855,14 @@
}) })
(define_insn "*andndi3_doubleword" (define_insn "*andndi3_doubleword"
[(set (match_operand:DI 0 "register_operand" "=&r,r,r,&r") [(set (match_operand:DI 0 "register_operand")
(and:DI (and:DI
(not:DI (match_operand:DI 1 "register_operand" "r,0,r,0")) (not:DI (match_operand:DI 1 "register_operand"))
(match_operand:DI 2 "nonimmediate_operand" "rm,rm,0,rm"))) (match_operand:DI 2 "nonimmediate_operand")))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"!TARGET_64BIT && TARGET_STV && TARGET_SSE2" "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
"#" && can_create_pseudo_p ()"
[(set_attr "isa" "bmi,bmi,bmi,*")]) "#")
(define_split (define_split
[(set (match_operand:DI 0 "register_operand") [(set (match_operand:DI 0 "register_operand")
...@@ -8902,7 +8871,7 @@ ...@@ -8902,7 +8871,7 @@
(match_operand:DI 2 "nonimmediate_operand"))) (match_operand:DI 2 "nonimmediate_operand")))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"!TARGET_64BIT && TARGET_BMI && TARGET_STV && TARGET_SSE2 "!TARGET_64BIT && TARGET_BMI && TARGET_STV && TARGET_SSE2
&& reload_completed" && can_create_pseudo_p ()"
[(parallel [(set (match_dup 0) [(parallel [(set (match_dup 0)
(and:SI (not:SI (match_dup 1)) (match_dup 2))) (and:SI (not:SI (match_dup 1)) (match_dup 2)))
(clobber (reg:CC FLAGS_REG))]) (clobber (reg:CC FLAGS_REG))])
...@@ -8914,20 +8883,25 @@ ...@@ -8914,20 +8883,25 @@
(define_split (define_split
[(set (match_operand:DI 0 "register_operand") [(set (match_operand:DI 0 "register_operand")
(and:DI (and:DI
(not:DI (match_dup 0)) (not:DI (match_operand:DI 1 "register_operand"))
(match_operand:DI 1 "nonimmediate_operand"))) (match_operand:DI 2 "nonimmediate_operand")))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"!TARGET_64BIT && !TARGET_BMI && TARGET_STV && TARGET_SSE2 "!TARGET_64BIT && !TARGET_BMI && TARGET_STV && TARGET_SSE2
&& reload_completed" && can_create_pseudo_p ()"
[(set (match_dup 0) (not:SI (match_dup 0))) [(set (match_dup 6) (not:SI (match_dup 1)))
(parallel [(set (match_dup 0) (parallel [(set (match_dup 0)
(and:SI (match_dup 0) (match_dup 1))) (and:SI (match_dup 6) (match_dup 2)))
(clobber (reg:CC FLAGS_REG))]) (clobber (reg:CC FLAGS_REG))])
(set (match_dup 2) (not:SI (match_dup 2))) (set (match_dup 7) (not:SI (match_dup 4)))
(parallel [(set (match_dup 2) (parallel [(set (match_dup 3)
(and:SI (match_dup 2) (match_dup 3))) (and:SI (match_dup 7) (match_dup 5)))
(clobber (reg:CC FLAGS_REG))])] (clobber (reg:CC FLAGS_REG))])]
"split_double_mode (DImode, &operands[0], 2, &operands[0], &operands[2]);") {
operands[6] = gen_reg_rtx (SImode);
operands[7] = gen_reg_rtx (SImode);
split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);
})
(define_insn "*andn<mode>_1" (define_insn "*andn<mode>_1"
[(set (match_operand:SWI48 0 "register_operand" "=r,r") [(set (match_operand:SWI48 0 "register_operand" "=r,r")
...@@ -8980,44 +8954,44 @@ ...@@ -8980,44 +8954,44 @@
"ix86_expand_binary_operator (<CODE>, <MODE>mode, operands); DONE;") "ix86_expand_binary_operator (<CODE>, <MODE>mode, operands); DONE;")
(define_insn_and_split "*<code>di3_doubleword" (define_insn_and_split "*<code>di3_doubleword"
[(set (match_operand:DI 0 "nonimmediate_operand" "=r,rm,r") [(set (match_operand:DI 0 "nonimmediate_operand")
(any_or:DI (any_or:DI
(match_operand:DI 1 "nonimmediate_operand" "%0,0,0") (match_operand:DI 1 "nonimmediate_operand")
(match_operand:DI 2 "x86_64_szext_general_operand" "Z,re,rm"))) (match_operand:DI 2 "x86_64_szext_general_operand")))
(clobber (reg:CC FLAGS_REG))] (clobber (reg:CC FLAGS_REG))]
"!TARGET_64BIT && TARGET_STV && TARGET_SSE2 "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
&& ix86_binary_operator_ok (<CODE>, DImode, operands)" && ix86_binary_operator_ok (<CODE>, DImode, operands)
&& can_create_pseudo_p ()"
"#" "#"
"&& reload_completed" "&& 1"
[(const_int 0)] [(const_int 0)]
{ {
split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]); split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);
if (operands[2] == constm1_rtx)
if (operands[2] == const0_rtx)
emit_move_insn (operands[0], operands[1]);
else if (operands[2] == constm1_rtx)
{ {
if (<CODE> == IOR) if (<CODE> == IOR)
{ emit_move_insn (operands[0], constm1_rtx);
operands[1] = constm1_rtx;
ix86_expand_move (SImode, &operands[0]);
}
else else
ix86_expand_unary_operator (NOT, SImode, &operands[0]); ix86_expand_unary_operator (NOT, SImode, &operands[0]);
} }
else if (operands[2] != const0_rtx) else
ix86_expand_binary_operator (<CODE>, SImode, &operands[0]); ix86_expand_binary_operator (<CODE>, SImode, &operands[0]);
else if (operands[5] == const0_rtx)
emit_note (NOTE_INSN_DELETED); if (operands[5] == const0_rtx)
if (operands[5] == constm1_rtx) emit_move_insn (operands[3], operands[4]);
else if (operands[5] == constm1_rtx)
{ {
if (<CODE> == IOR) if (<CODE> == IOR)
{ emit_move_insn (operands[3], constm1_rtx);
operands[4] = constm1_rtx;
ix86_expand_move (SImode, &operands[3]);
}
else else
ix86_expand_unary_operator (NOT, SImode, &operands[3]); ix86_expand_unary_operator (NOT, SImode, &operands[3]);
} }
else if (operands[5] != const0_rtx) else
ix86_expand_binary_operator (<CODE>, SImode, &operands[3]); ix86_expand_binary_operator (<CODE>, SImode, &operands[3]);
DONE; DONE;
}) })
...@@ -9673,12 +9647,13 @@ ...@@ -9673,12 +9647,13 @@
"ix86_expand_unary_operator (NOT, <MODE>mode, operands); DONE;") "ix86_expand_unary_operator (NOT, <MODE>mode, operands); DONE;")
(define_insn_and_split "*one_cmpldi2_doubleword" (define_insn_and_split "*one_cmpldi2_doubleword"
[(set (match_operand:DI 0 "nonimmediate_operand" "=rm") [(set (match_operand:DI 0 "nonimmediate_operand")
(not:DI (match_operand:DI 1 "nonimmediate_operand" "0")))] (not:DI (match_operand:DI 1 "nonimmediate_operand")))]
"!TARGET_64BIT && TARGET_STV && TARGET_SSE2 "!TARGET_64BIT && TARGET_STV && TARGET_SSE2
&& ix86_unary_operator_ok (NOT, DImode, operands)" && ix86_unary_operator_ok (NOT, DImode, operands)
&& can_create_pseudo_p ()"
"#" "#"
"&& reload_completed" "&& 1"
[(set (match_dup 0) [(set (match_dup 0)
(not:SI (match_dup 1))) (not:SI (match_dup 1)))
(set (match_dup 2) (set (match_dup 2)
......
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