target-supports.exp (check_effective_target_vect_usad_char): Add PowerPC support.

	* lib/target-supports.exp (check_effective_target_vect_usad_char):
	Add PowerPC support.
	* gcc.dg/vect/slp-reduc-sad.c: Update scan string.
	* gcc.dg/vect/vect-reduc-sad.c: Likewise.

From-SVN: r269043

gcc/testsuite/ChangeLog

+2019-02-20  Pat Haugen  <pthaugen@us.ibm.com>
+
+	* lib/target-supports.exp (check_effective_target_vect_usad_char):
+	Add PowerPC support.
+	* gcc.dg/vect/slp-reduc-sad.c: Update scan string.
+	* gcc.dg/vect/vect-reduc-sad.c: Likewise.
+
 2019-02-20 Andre Vieira  <andre.simoesdiasvieira@arm.com>
 
 	PR target/86487

gcc/testsuite/gcc.dg/vect/slp-reduc-sad.c

@@ -58,6 +58,6 @@ main ()
   return 0;
 }
 
-/* { dg-final { scan-tree-dump "vect_recog_sad_pattern: detected" "vect" } } */
+/* { dg-final { scan-tree-dump "sad pattern recognized" "vect" } } */
 /* { dg-final { scan-tree-dump "vectorizing stmts using SLP" "vect" } } */
 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */

gcc/testsuite/gcc.dg/vect/vect-reduc-sad.c

@@ -49,6 +49,6 @@ main (void)
   return 0;
 }
 
-/* { dg-final { scan-tree-dump-times "vect_recog_sad_pattern: detected" 1 "vect" } } */
+/* { dg-final { scan-tree-dump-times "sad pattern recognized" 1 "vect" } } */
 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
 

gcc/testsuite/lib/target-supports.exp

@@ -6047,7 +6047,9 @@ proc check_effective_target_vect_usad_char { } {
       expr { [istarget i?86-*-*]
 	      || [istarget x86_64-*-*]
 	      || ([istarget aarch64*-*-*]
-		  && ![check_effective_target_aarch64_sve])}}]
+		  && ![check_effective_target_aarch64_sve])
+	      || ([istarget powerpc*-*-*]
+		  && [check_p9vector_hw_available])}}]
 }
 
 # Return 1 if the target plus current options supports both signed