Commit 98966963 by Julia Koval Committed by Kirill Yukhin

Enable VNNI support [1/5]

gcc/
	* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VNNI_SET,
	OPTION_MASK_ISA_AVX512VNNI_UNSET): New.
	(ix86_handle_option): Handle -mavx512vnni.
	* config/i386/cpuid.h (bit_AVX512VNNI): New bit.
	* config/i386/driver-i386.c (host_detect_local_cpu): Handle new bit.
	* config/i386/i386-c (__AVX512VNNI__): New.
	* config/i386/i386.c (ix86_target_string): Handle new option.
	(ix86_valid_target_attribute_inner_p): Handle new option.
	* config/i386/i386.h (TARGET_AVX512VNNI, TARGET_AVX512VNNI_P): New.
	* config/i386/i386.opt (mavx512vnni): New option.

From-SVN: r255401
parent ae4bb13f
2017-12-05 Julia Koval <julia.koval@intel.com>
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VNNI_SET,
OPTION_MASK_ISA_AVX512VNNI_UNSET): New.
(ix86_handle_option): Handle -mavx512vnni.
* config/i386/cpuid.h (bit_AVX512VNNI): New bit.
* config/i386/driver-i386.c (host_detect_local_cpu): Handle new bit.
* config/i386/i386-c (__AVX512VNNI__): New.
* config/i386/i386.c (ix86_target_string): Handle new option.
(ix86_valid_target_attribute_inner_p): Handle new option.
* config/i386/i386.h (TARGET_AVX512VNNI, TARGET_AVX512VNNI_P): New.
* config/i386/i386.opt (mavx512vnni): New option.
2017-12-01 Jan Hubicka <hubicka@ucw.cz> 2017-12-01 Jan Hubicka <hubicka@ucw.cz>
PR target/81616 PR target/81616
...@@ -81,6 +81,7 @@ along with GCC; see the file COPYING3. If not see ...@@ -81,6 +81,7 @@ along with GCC; see the file COPYING3. If not see
#define OPTION_MASK_ISA_AVX5124FMAPS_SET OPTION_MASK_ISA_AVX5124FMAPS #define OPTION_MASK_ISA_AVX5124FMAPS_SET OPTION_MASK_ISA_AVX5124FMAPS
#define OPTION_MASK_ISA_AVX5124VNNIW_SET OPTION_MASK_ISA_AVX5124VNNIW #define OPTION_MASK_ISA_AVX5124VNNIW_SET OPTION_MASK_ISA_AVX5124VNNIW
#define OPTION_MASK_ISA_AVX512VBMI2_SET OPTION_MASK_ISA_AVX512VBMI2 #define OPTION_MASK_ISA_AVX512VBMI2_SET OPTION_MASK_ISA_AVX512VBMI2
#define OPTION_MASK_ISA_AVX512VNNI_SET OPTION_MASK_ISA_AVX512VNNI
#define OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET OPTION_MASK_ISA_AVX512VPOPCNTDQ #define OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET OPTION_MASK_ISA_AVX512VPOPCNTDQ
#define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM #define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM
#define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW #define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW
...@@ -193,6 +194,7 @@ along with GCC; see the file COPYING3. If not see ...@@ -193,6 +194,7 @@ along with GCC; see the file COPYING3. If not see
#define OPTION_MASK_ISA_AVX5124FMAPS_UNSET OPTION_MASK_ISA_AVX5124FMAPS #define OPTION_MASK_ISA_AVX5124FMAPS_UNSET OPTION_MASK_ISA_AVX5124FMAPS
#define OPTION_MASK_ISA_AVX5124VNNIW_UNSET OPTION_MASK_ISA_AVX5124VNNIW #define OPTION_MASK_ISA_AVX5124VNNIW_UNSET OPTION_MASK_ISA_AVX5124VNNIW
#define OPTION_MASK_ISA_AVX512VBMI2_UNSET OPTION_MASK_ISA_AVX512VBMI2 #define OPTION_MASK_ISA_AVX512VBMI2_UNSET OPTION_MASK_ISA_AVX512VBMI2
#define OPTION_MASK_ISA_AVX512VNNI_UNSET OPTION_MASK_ISA_AVX512VNNI
#define OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET OPTION_MASK_ISA_AVX512VPOPCNTDQ #define OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET OPTION_MASK_ISA_AVX512VPOPCNTDQ
#define OPTION_MASK_ISA_RTM_UNSET OPTION_MASK_ISA_RTM #define OPTION_MASK_ISA_RTM_UNSET OPTION_MASK_ISA_RTM
#define OPTION_MASK_ISA_PRFCHW_UNSET OPTION_MASK_ISA_PRFCHW #define OPTION_MASK_ISA_PRFCHW_UNSET OPTION_MASK_ISA_PRFCHW
...@@ -582,6 +584,21 @@ ix86_handle_option (struct gcc_options *opts, ...@@ -582,6 +584,21 @@ ix86_handle_option (struct gcc_options *opts,
} }
return true; return true;
case OPT_mavx512vnni:
if (value)
{
opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX512VNNI_SET;
opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX512VNNI_SET;
opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX512F_SET;
opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX512F_SET;
}
else
{
opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_AVX512VNNI_UNSET;
opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX512VNNI_UNSET;
}
return true;
case OPT_mavx512vpopcntdq: case OPT_mavx512vpopcntdq:
if (value) if (value)
{ {
......
...@@ -100,6 +100,7 @@ ...@@ -100,6 +100,7 @@
#define bit_AVX512VBMI2 (1 << 6) #define bit_AVX512VBMI2 (1 << 6)
#define bit_SHSTK (1 << 7) #define bit_SHSTK (1 << 7)
#define bit_GFNI (1 << 8) #define bit_GFNI (1 << 8)
#define bit_AVX512VNNI (1 << 11)
#define bit_AVX512VPOPCNTDQ (1 << 14) #define bit_AVX512VPOPCNTDQ (1 << 14)
#define bit_RDPID (1 << 22) #define bit_RDPID (1 << 22)
......
...@@ -417,6 +417,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) ...@@ -417,6 +417,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
unsigned int has_avx5124fmaps = 0, has_avx5124vnniw = 0; unsigned int has_avx5124fmaps = 0, has_avx5124vnniw = 0;
unsigned int has_gfni = 0, has_avx512vbmi2 = 0; unsigned int has_gfni = 0, has_avx512vbmi2 = 0;
unsigned int has_ibt = 0, has_shstk = 0; unsigned int has_ibt = 0, has_shstk = 0;
unsigned int has_avx512vnni = 0;
bool arch; bool arch;
...@@ -506,6 +507,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) ...@@ -506,6 +507,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
has_avx512vbmi = ecx & bit_AVX512VBMI; has_avx512vbmi = ecx & bit_AVX512VBMI;
has_pku = ecx & bit_OSPKE; has_pku = ecx & bit_OSPKE;
has_avx512vbmi2 = ecx & bit_AVX512VBMI2; has_avx512vbmi2 = ecx & bit_AVX512VBMI2;
has_avx512vnni = ecx & bit_AVX512VNNI;
has_rdpid = ecx & bit_RDPID; has_rdpid = ecx & bit_RDPID;
has_gfni = ecx & bit_GFNI; has_gfni = ecx & bit_GFNI;
...@@ -1064,6 +1066,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) ...@@ -1064,6 +1066,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
const char *avx512vbmi = has_avx512vbmi ? " -mavx512vbmi" : " -mno-avx512vbmi"; const char *avx512vbmi = has_avx512vbmi ? " -mavx512vbmi" : " -mno-avx512vbmi";
const char *avx5124vnniw = has_avx5124vnniw ? " -mavx5124vnniw" : " -mno-avx5124vnniw"; const char *avx5124vnniw = has_avx5124vnniw ? " -mavx5124vnniw" : " -mno-avx5124vnniw";
const char *avx512vbmi2 = has_avx512vbmi2 ? " -mavx512vbmi2" : " -mno-avx512vbmi2"; const char *avx512vbmi2 = has_avx512vbmi2 ? " -mavx512vbmi2" : " -mno-avx512vbmi2";
const char *avx512vnni = has_avx512vnni ? " -mavx512vnni" : " -mno-avx512vnni";
const char *avx5124fmaps = has_avx5124fmaps ? " -mavx5124fmaps" : " -mno-avx5124fmaps"; const char *avx5124fmaps = has_avx5124fmaps ? " -mavx5124fmaps" : " -mno-avx5124fmaps";
const char *clwb = has_clwb ? " -mclwb" : " -mno-clwb"; const char *clwb = has_clwb ? " -mclwb" : " -mno-clwb";
const char *mwaitx = has_mwaitx ? " -mmwaitx" : " -mno-mwaitx"; const char *mwaitx = has_mwaitx ? " -mmwaitx" : " -mno-mwaitx";
...@@ -1083,7 +1086,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) ...@@ -1083,7 +1086,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
xsavec, xsaves, avx512dq, avx512bw, avx512vl, xsavec, xsaves, avx512dq, avx512bw, avx512vl,
avx512ifma, avx512vbmi, avx5124fmaps, avx5124vnniw, avx512ifma, avx512vbmi, avx5124fmaps, avx5124vnniw,
clwb, mwaitx, clzero, pku, rdpid, gfni, ibt, shstk, clwb, mwaitx, clzero, pku, rdpid, gfni, ibt, shstk,
avx512vbmi2, NULL); avx512vbmi2, avx512vnni, NULL);
} }
done: done:
......
...@@ -394,6 +394,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, ...@@ -394,6 +394,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
def_or_undef (parse_in, "__AVX5124VNNIW__"); def_or_undef (parse_in, "__AVX5124VNNIW__");
if (isa_flag2 & OPTION_MASK_ISA_AVX512VBMI2) if (isa_flag2 & OPTION_MASK_ISA_AVX512VBMI2)
def_or_undef (parse_in, "__AVX512VBMI2__"); def_or_undef (parse_in, "__AVX512VBMI2__");
if (isa_flag2 & OPTION_MASK_ISA_AVX512VNNI)
def_or_undef (parse_in, "__AVX512VNNI__");
if (isa_flag2 & OPTION_MASK_ISA_SGX) if (isa_flag2 & OPTION_MASK_ISA_SGX)
def_or_undef (parse_in, "__SGX__"); def_or_undef (parse_in, "__SGX__");
if (isa_flag2 & OPTION_MASK_ISA_AVX5124FMAPS) if (isa_flag2 & OPTION_MASK_ISA_AVX5124FMAPS)
......
...@@ -2747,6 +2747,7 @@ ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2, ...@@ -2747,6 +2747,7 @@ ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2,
{ {
{ "-mmpx", OPTION_MASK_ISA_MPX }, { "-mmpx", OPTION_MASK_ISA_MPX },
{ "-mavx512vbmi2", OPTION_MASK_ISA_AVX512VBMI2 }, { "-mavx512vbmi2", OPTION_MASK_ISA_AVX512VBMI2 },
{ "-mavx512vnni", OPTION_MASK_ISA_AVX512VNNI },
{ "-mrdpid", OPTION_MASK_ISA_RDPID }, { "-mrdpid", OPTION_MASK_ISA_RDPID },
{ "-msgx", OPTION_MASK_ISA_SGX }, { "-msgx", OPTION_MASK_ISA_SGX },
{ "-mavx5124vnniw", OPTION_MASK_ISA_AVX5124VNNIW }, { "-mavx5124vnniw", OPTION_MASK_ISA_AVX5124VNNIW },
...@@ -5256,6 +5257,7 @@ ix86_valid_target_attribute_inner_p (tree args, char *p_strings[], ...@@ -5256,6 +5257,7 @@ ix86_valid_target_attribute_inner_p (tree args, char *p_strings[],
IX86_ATTR_ISA ("avx5124vnniw", OPT_mavx5124vnniw), IX86_ATTR_ISA ("avx5124vnniw", OPT_mavx5124vnniw),
IX86_ATTR_ISA ("avx512vpopcntdq", OPT_mavx512vpopcntdq), IX86_ATTR_ISA ("avx512vpopcntdq", OPT_mavx512vpopcntdq),
IX86_ATTR_ISA ("avx512vbmi2", OPT_mavx512vbmi2), IX86_ATTR_ISA ("avx512vbmi2", OPT_mavx512vbmi2),
IX86_ATTR_ISA ("avx512vnni", OPT_mavx512vnni),
IX86_ATTR_ISA ("avx512vbmi", OPT_mavx512vbmi), IX86_ATTR_ISA ("avx512vbmi", OPT_mavx512vbmi),
IX86_ATTR_ISA ("avx512ifma", OPT_mavx512ifma), IX86_ATTR_ISA ("avx512ifma", OPT_mavx512ifma),
...@@ -89,6 +89,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ...@@ -89,6 +89,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
#define TARGET_AVX512VBMI2_P(x) TARGET_ISA_AVX512VBMI2_P(x) #define TARGET_AVX512VBMI2_P(x) TARGET_ISA_AVX512VBMI2_P(x)
#define TARGET_AVX512VPOPCNTDQ TARGET_ISA_AVX512VPOPCNTDQ #define TARGET_AVX512VPOPCNTDQ TARGET_ISA_AVX512VPOPCNTDQ
#define TARGET_AVX512VPOPCNTDQ_P(x) TARGET_ISA_AVX512VPOPCNTDQ_P(x) #define TARGET_AVX512VPOPCNTDQ_P(x) TARGET_ISA_AVX512VPOPCNTDQ_P(x)
#define TARGET_AVX512VNNI TARGET_ISA_AVX512VNNI
#define TARGET_AVX512VNNI_P(x) TARGET_ISA_AVX512VNNI_P(x)
#define TARGET_FMA TARGET_ISA_FMA #define TARGET_FMA TARGET_ISA_FMA
#define TARGET_FMA_P(x) TARGET_ISA_FMA_P(x) #define TARGET_FMA_P(x) TARGET_ISA_FMA_P(x)
#define TARGET_SSE4A TARGET_ISA_SSE4A #define TARGET_SSE4A TARGET_ISA_SSE4A
......
...@@ -741,6 +741,10 @@ mavx512vbmi2 ...@@ -741,6 +741,10 @@ mavx512vbmi2
Target Report Mask(ISA_AVX512VBMI2) Var(ix86_isa_flags2) Save Target Report Mask(ISA_AVX512VBMI2) Var(ix86_isa_flags2) Save
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VBMI2 built-in functions and code generation. Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VBMI2 built-in functions and code generation.
mavx512vnni
Target Report Mask(ISA_AVX512VNNI) Var(ix86_isa_flags2) Save
Support AVX512VNNI built-in functions and code generation.
mfma mfma
Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation. Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation.
......
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