Commit 985d0d50 by Bob Wilson Committed by Bob Wilson

xtensa.c (order_regs_for_local_alloc): Order the coprocessor registers before…

xtensa.c (order_regs_for_local_alloc): Order the coprocessor registers before floating-point registers.

        * config/xtensa/xtensa.c (order_regs_for_local_alloc): Order the
        coprocessor registers before floating-point registers.
        * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Adjust register numbers
        to account for a previously removed register.
        (SPEC_REG_FIRST, SPEC_REG_LAST, SPEC_REG_NUM, COUNT_REGISTER_REGNUM):
        Delete unused macros.

From-SVN: r62340
parent 7f0e57bd
2003-02-03 Bob Wilson <bob.wilson@acm.org>
* config/xtensa/xtensa.c (order_regs_for_local_alloc): Order the
coprocessor registers before floating-point registers.
* config/xtensa/xtensa.h (REG_ALLOC_ORDER): Adjust register numbers
to account for a previously removed register.
(SPEC_REG_FIRST, SPEC_REG_LAST, SPEC_REG_NUM, COUNT_REGISTER_REGNUM):
Delete unused macros.
Mon Feb 3 21:19:11 CET 2003 Jan Hubicka <jh@suse.cz> Mon Feb 3 21:19:11 CET 2003 Jan Hubicka <jh@suse.cz>
* i386.c (ix86_expand_store_builtin): Always force op1 to register. * i386.c (ix86_expand_store_builtin): Always force op1 to register.
......
...@@ -2725,6 +2725,10 @@ order_regs_for_local_alloc () ...@@ -2725,6 +2725,10 @@ order_regs_for_local_alloc ()
for (i = 0; i < num_arg_regs; i++) for (i = 0; i < num_arg_regs; i++)
reg_alloc_order[nxt++] = GP_ARG_FIRST + i; reg_alloc_order[nxt++] = GP_ARG_FIRST + i;
/* list the coprocessor registers in order */
for (i = 0; i < BR_REG_NUM; i++)
reg_alloc_order[nxt++] = BR_REG_FIRST + i;
/* list the FP registers in order for now */ /* list the FP registers in order for now */
for (i = 0; i < 16; i++) for (i = 0; i < 16; i++)
reg_alloc_order[nxt++] = FP_REG_FIRST + i; reg_alloc_order[nxt++] = FP_REG_FIRST + i;
...@@ -2735,10 +2739,6 @@ order_regs_for_local_alloc () ...@@ -2735,10 +2739,6 @@ order_regs_for_local_alloc ()
reg_alloc_order[nxt++] = 16; /* pseudo frame pointer */ reg_alloc_order[nxt++] = 16; /* pseudo frame pointer */
reg_alloc_order[nxt++] = 17; /* pseudo arg pointer */ reg_alloc_order[nxt++] = 17; /* pseudo arg pointer */
/* list the coprocessor registers in order */
for (i = 0; i < BR_REG_NUM; i++)
reg_alloc_order[nxt++] = BR_REG_FIRST + i;
reg_alloc_order[nxt++] = ACC_REG_FIRST; /* MAC16 accumulator */ reg_alloc_order[nxt++] = ACC_REG_FIRST; /* MAC16 accumulator */
} }
} }
......
...@@ -345,7 +345,6 @@ extern unsigned xtensa_current_frame_size; ...@@ -345,7 +345,6 @@ extern unsigned xtensa_current_frame_size;
0 - 15 AR[0] - AR[15] 0 - 15 AR[0] - AR[15]
16 FRAME_POINTER (fake = initial sp) 16 FRAME_POINTER (fake = initial sp)
17 ARG_POINTER (fake = initial sp + framesize) 17 ARG_POINTER (fake = initial sp + framesize)
18 LOOP_COUNT (loop count special register)
18 BR[0] for floating-point CC 18 BR[0] for floating-point CC
19 - 34 FR[0] - FR[15] 19 - 34 FR[0] - FR[15]
35 MAC16 accumulator */ 35 MAC16 accumulator */
...@@ -394,10 +393,11 @@ extern unsigned xtensa_current_frame_size; ...@@ -394,10 +393,11 @@ extern unsigned xtensa_current_frame_size;
have been exhausted. */ have been exhausted. */
#define REG_ALLOC_ORDER \ #define REG_ALLOC_ORDER \
{ 8, 9, 10, 11, 12, 13, 14, 15, 7, 6, 5, 4, 3, 2, 19, \ { 8, 9, 10, 11, 12, 13, 14, 15, 7, 6, 5, 4, 3, 2, \
20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, \ 18, \
19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, \
0, 1, 16, 17, \ 0, 1, 16, 17, \
36, \ 35, \
} }
#define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc () #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
...@@ -424,11 +424,6 @@ extern int leaf_function; ...@@ -424,11 +424,6 @@ extern int leaf_function;
#define GP_REG_LAST 17 #define GP_REG_LAST 17
#define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1) #define GP_REG_NUM (GP_REG_LAST - GP_REG_FIRST + 1)
/* Special registers */
#define SPEC_REG_FIRST 18
#define SPEC_REG_LAST 18
#define SPEC_REG_NUM (SPEC_REG_LAST - SPEC_REG_FIRST + 1)
/* Coprocessor registers */ /* Coprocessor registers */
#define BR_REG_FIRST 18 #define BR_REG_FIRST 18
#define BR_REG_LAST 18 #define BR_REG_LAST 18
...@@ -473,9 +468,6 @@ extern char xtensa_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER]; ...@@ -473,9 +468,6 @@ extern char xtensa_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER];
== (GET_MODE_CLASS (MODE2) == MODE_FLOAT || \ == (GET_MODE_CLASS (MODE2) == MODE_FLOAT || \
GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT)) GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
/* Register to use for LCOUNT special register. */
#define COUNT_REGISTER_REGNUM (SPEC_REG_FIRST + 0)
/* Register to use for pushing function arguments. */ /* Register to use for pushing function arguments. */
#define STACK_POINTER_REGNUM (GP_REG_FIRST + 1) #define STACK_POINTER_REGNUM (GP_REG_FIRST + 1)
......
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