Commit 984c2f30 by James Greenhalgh Committed by James Greenhalgh

[ARM] Initialize new tune_params values

gcc/

	* config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
	(arm_cortex_a12_tune): Likewise.

From-SVN: r209710
parent 18b42b2a
2014-04-23 James Greenhalgh <james.greenhalgh@arm.com>
* config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
(arm_cortex_a12_tune): Likewise.
2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com> 2014-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (aarch64_rtx_costs): Handle BSWAP. * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle BSWAP.
......
...@@ -1781,7 +1781,8 @@ const struct tune_params arm_cortex_a57_tune = ...@@ -1781,7 +1781,8 @@ const struct tune_params arm_cortex_a57_tune =
true, /* Prefer LDRD/STRD. */ true, /* Prefer LDRD/STRD. */
{true, true}, /* Prefer non short circuit. */ {true, true}, /* Prefer non short circuit. */
&arm_default_vec_cost, /* Vectorizer costs. */ &arm_default_vec_cost, /* Vectorizer costs. */
false /* Prefer Neon for 64-bits bitops. */ false, /* Prefer Neon for 64-bits bitops. */
true, true /* Prefer 32-bit encodings. */
}; };
/* Branches can be dual-issued on Cortex-A5, so conditional execution is /* Branches can be dual-issued on Cortex-A5, so conditional execution is
...@@ -1834,7 +1835,8 @@ const struct tune_params arm_cortex_a12_tune = ...@@ -1834,7 +1835,8 @@ const struct tune_params arm_cortex_a12_tune =
true, /* Prefer LDRD/STRD. */ true, /* Prefer LDRD/STRD. */
{true, true}, /* Prefer non short circuit. */ {true, true}, /* Prefer non short circuit. */
&arm_default_vec_cost, /* Vectorizer costs. */ &arm_default_vec_cost, /* Vectorizer costs. */
false /* Prefer Neon for 64-bits bitops. */ false, /* Prefer Neon for 64-bits bitops. */
false, false /* Prefer 32-bit encodings. */
}; };
/* armv7m tuning. On Cortex-M4 cores for example, MOVW/MOVT take a single /* armv7m tuning. On Cortex-M4 cores for example, MOVW/MOVT take a single
......
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