Commit 982213b5 by Anthony Green Committed by Anthony Green

Switch to 16-bit offsets for moxie ldo/sto instructions

From-SVN: r219080
parent fd6cc689
2014-12-27 Anthony Green <green@moxielogic.com>
* config/moxie/moxie-protos.h (moxie_offset_address_p): Define.
* config/moxie/constraints.md (B): Replace inline test with call
to moxie_offset_address_p.
* config/moxie/moxie.h (GO_IF_LEGITIMATE_ADDRESS): Limit offset
addressing to 16-bit offsets.
* config/moxie/moxie.c (moxie_asm_trampoline_template): Remove
nop, which is no longer needed for aligned write to trampoline.
(moxie_trampoline_init): Adjust for smaller trampoline.
(moxie_offset_address_p): New function.
* config/moxie/moxie.md (*movsi, *movhi, *movqi): Adjust length
attr for shorter ldo/sto instructions.
* config/moxie/predicates.md: Only allow REG+CONST_INT for offset
load/stores.
2014-12-27 Jan hubicka <hubicka@ucw.cz> 2014-12-27 Jan hubicka <hubicka@ucw.cz>
* ipa-inline.c (max_count_real, max_relbenefit_real, * ipa-inline.c (max_count_real, max_relbenefit_real,
...@@ -32,7 +32,7 @@ ...@@ -32,7 +32,7 @@
(define_constraint "B" (define_constraint "B"
"An offset address." "An offset address."
(and (match_code "mem") (and (match_code "mem")
(match_test "GET_CODE (XEXP (op, 0)) == PLUS"))) (match_test "moxie_offset_address_p (op)")))
(define_constraint "W" (define_constraint "W"
"A register indirect memory operand." "A register indirect memory operand."
......
...@@ -22,3 +22,4 @@ extern void moxie_expand_epilogue (void); ...@@ -22,3 +22,4 @@ extern void moxie_expand_epilogue (void);
extern int moxie_initial_elimination_offset (int, int); extern int moxie_initial_elimination_offset (int, int);
extern void moxie_print_operand (FILE *, rtx, int); extern void moxie_print_operand (FILE *, rtx, int);
extern void moxie_print_operand_address (FILE *, rtx); extern void moxie_print_operand_address (FILE *, rtx);
extern bool moxie_offset_address_p (rtx);
...@@ -555,7 +555,6 @@ moxie_asm_trampoline_template (FILE *f) ...@@ -555,7 +555,6 @@ moxie_asm_trampoline_template (FILE *f)
fprintf (f, "\tldi.l $r0, 0x0\n"); fprintf (f, "\tldi.l $r0, 0x0\n");
fprintf (f, "\tsto.l 0x8($fp), $r0\n"); fprintf (f, "\tsto.l 0x8($fp), $r0\n");
fprintf (f, "\tpop $sp, $r0\n"); fprintf (f, "\tpop $sp, $r0\n");
fprintf (f, "\tnop\n");
fprintf (f, "\tjmpa 0x0\n"); fprintf (f, "\tjmpa 0x0\n");
} }
...@@ -571,10 +570,28 @@ moxie_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) ...@@ -571,10 +570,28 @@ moxie_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
mem = adjust_address (m_tramp, SImode, 4); mem = adjust_address (m_tramp, SImode, 4);
emit_move_insn (mem, chain_value); emit_move_insn (mem, chain_value);
mem = adjust_address (m_tramp, SImode, 20); mem = adjust_address (m_tramp, SImode, 16);
emit_move_insn (mem, fnaddr); emit_move_insn (mem, fnaddr);
} }
/* Return true for memory offset addresses between -32768 and 32767. */
bool
moxie_offset_address_p (rtx x)
{
x = XEXP (x, 0);
if (GET_CODE (x) == PLUS)
{
x = XEXP (x, 1);
if (GET_CODE (x) == CONST_INT)
{
unsigned int v = INTVAL (x) & 0xFFFF8000;
return (v == 0xFFFF8000 || v == 0x00000000);
}
}
return 0;
}
/* The Global `targetm' Variable. */ /* The Global `targetm' Variable. */
/* Initialize the GCC target structure. */ /* Initialize the GCC target structure. */
......
...@@ -362,7 +362,7 @@ enum reg_class ...@@ -362,7 +362,7 @@ enum reg_class
#define FUNCTION_PROFILER(FILE,LABELNO) (abort (), 0) #define FUNCTION_PROFILER(FILE,LABELNO) (abort (), 0)
/* Trampolines for Nested Functions. */ /* Trampolines for Nested Functions. */
#define TRAMPOLINE_SIZE (2 + 6 + 6 + 2 + 2 + 6) #define TRAMPOLINE_SIZE (2 + 6 + 4 + 2 + 6)
/* Alignment required for trampolines, in bits. */ /* Alignment required for trampolines, in bits. */
#define TRAMPOLINE_ALIGNMENT 32 #define TRAMPOLINE_ALIGNMENT 32
...@@ -462,7 +462,8 @@ enum reg_class ...@@ -462,7 +462,8 @@ enum reg_class
op1 = XEXP(X,0); \ op1 = XEXP(X,0); \
op2 = XEXP(X,1); \ op2 = XEXP(X,1); \
if (GET_CODE(op1) == REG \ if (GET_CODE(op1) == REG \
&& CONSTANT_ADDRESS_P(op2) \ && GET_CODE(op2) == CONST_INT \
&& IN_RANGE (INTVAL (op2), -32768, 32767) \
&& REGNO_OK_FOR_BASE_P(REGNO(op1))) \ && REGNO_OK_FOR_BASE_P(REGNO(op1))) \
goto LABEL; \ goto LABEL; \
} \ } \
......
...@@ -266,7 +266,7 @@ ...@@ -266,7 +266,7 @@
lda.l %0, %1 lda.l %0, %1
sto.l %0, %1 sto.l %0, %1
ldo.l %0, %1" ldo.l %0, %1"
[(set_attr "length" "2,2,6,2,6,2,6,6,6")]) [(set_attr "length" "2,2,6,2,6,2,6,4,4")])
(define_insn_and_split "zero_extendqisi2" (define_insn_and_split "zero_extendqisi2"
[(set (match_operand:SI 0 "register_operand" "=r,r,r,r") [(set (match_operand:SI 0 "register_operand" "=r,r,r,r")
...@@ -344,7 +344,7 @@ ...@@ -344,7 +344,7 @@
lda.b %0, %1 lda.b %0, %1
sto.b %0, %1 sto.b %0, %1
ldo.b %0, %1" ldo.b %0, %1"
[(set_attr "length" "2,2,6,2,6,2,6,6,6")]) [(set_attr "length" "2,2,6,2,6,2,6,4,4")])
(define_expand "movhi" (define_expand "movhi"
[(set (match_operand:HI 0 "general_operand" "") [(set (match_operand:HI 0 "general_operand" "")
...@@ -372,7 +372,7 @@ ...@@ -372,7 +372,7 @@
lda.s %0, %1 lda.s %0, %1
sto.s %0, %1 sto.s %0, %1
ldo.s %0, %1" ldo.s %0, %1"
[(set_attr "length" "2,2,6,2,6,2,6,6,6")]) [(set_attr "length" "2,2,6,2,6,2,6,4,4")])
;; ------------------------------------------------------------------------- ;; -------------------------------------------------------------------------
;; Compare instructions ;; Compare instructions
......
...@@ -34,7 +34,7 @@ ...@@ -34,7 +34,7 @@
if (MEM_P (op) if (MEM_P (op)
&& GET_CODE (XEXP (op, 0)) == PLUS && GET_CODE (XEXP (op, 0)) == PLUS
&& GET_CODE (XEXP (XEXP (op, 0), 0)) == REG && GET_CODE (XEXP (XEXP (op, 0), 0)) == REG
&& GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST) && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT)
return 1; return 1;
return general_operand (op, mode); return general_operand (op, mode);
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment