Commit 97e242b0 by Richard Henderson Committed by Richard Henderson

ia64-protos.h: Remove duplicates.

	* config/ia64/ia64-protos.h: Remove duplicates.  Update
	for massive code rearrangements.
	* config/ia64/ia64.c (ia64_arpfs_regno): Remove.
	(ia64_rp_regno, ia64_fp_regno, ia64_input_regs): Remove.
	(ia64_local_regs, ia64_need_regstk): Remove.
	(ar_ccv_reg_operand): New.
	(ia64_gp_save_reg): New.
	(struct ia64_frame_info): Combine most of the size elements;
	add new gr save elements.
	(find_gr_spill): New.
	(next_scratch_gr_reg): New.
	(mark_reg_gr_used_mask): New.
	(ia64_compute_frame_size): Rewrite.  Allocate special AR regs
	to GR backing store regs when possible.
	(ia64_initial_elimination_offset): New.
	(ia64_rap_fp_offset): Remove.
	(save_restore_insns): Remove.
	(setup_spill_pointers): New.
	(finish_spill_pointers): New.
	(spill_restore_mem): New.
	(do_spill, do_restore): New.
	(ia64_expand_prologue): Rewrite to use them.
	(ia64_expand_epilogue): Likewise.
	(ia64_direct_return): Update for current_frame_info changes.
	(ia64_function_prologue): Simplify .prologue emission.  Emit
	.spill when needed.
	(ia64_setup_incoming_varargs): Don't ever emit rtl.
	(ia64_dbx_register_number): New.
	(ia64_initialize_trampoline): New.
	(ia64_secondary_reload_class): Request GR_REGS for integer
	arithmetic destined for FR_REGS.
	(ia64_init_machine_status): Don't reset return_address_pointer_rtx.
	(ia64_mark_machine_status): Mark ia64_gp_save.
	(rws_access_regno): Rename from rws_access_reg; don't treat
	predicates specially.
	(rws_access_reg): New.  Update all callers.
	(rtx_needs_barrier): Remove dead unspecs.
	(ia64_epilogue_uses): Mark ar.pfs and ar.unat live on exit.
	(ia64_encode_section_info): Silence signed/unsigned warnings.
	(spill_offset, sp_offset, spill_offset_emitted): Remove.
	(tmp_reg, tmp_saved): Remove.
	(process_set): Rewrite to expect complicated bits via
	REG_FRAME_RELATED_EXPR.
	(ia64_expand_fetch_and_op): Use emit_move_insn; be explicit
	in the use of ar.ccv; never set RTX_UNCHANGING_P.
	(ia64_expand_op_and_fetch): Likewise.
	(ia64_expand_compare_and_swap): Likewise.
	(ia64_expand_builtin): Likewise.
	* config/ia64/ia64.h (AR_UNAT_REGNUM): New.
	(FIRST_PSEUDO_REGISTER): Update.
	(AR_M_REGNO_P): Update.
	(FIXED_REGS): Don't mark three local registers as used.
	(EXTRA_CC_MODES): New.
	(SELECT_CC_MODE): New.
	(HARD_REGNO_NREGS): Allow DImode in p0; handle CCImode.
	(HARD_REGNO_MODE_OK): Disallow CCImode from non-predicates.
	(FRAME_GROWS_DOWNWARD): Unset.
	(STARTING_FRAME_OFFSET): Zero.
	(ELIMINABLE_REGS): Eliminate from the soft to hard frame pointer.
	(INITIAL_ELIMINATION_OFFSET): Defer to out of line function.
	(HARD_FRAME_POINTER_REGNUM): New.
	(CAN_DEBUG_WITHOUT_FP): Define.
	(TRAMPOLINE_TEMPLATE): Remove.
	(TRAMPOLINE_SIZE): Lower to 32.
	(TRAMPOLINE_ALIGNMENT): Lower to 64.
	(INITIALIZE_TRAMPOLINE): Defer to out of line function.
	(PREDICATE_CODES): Update.
	(struct machine_function): Add ia64_gp_save.
	* config/ia64/ia64.md: Purge unused unspecs.
	(movsi patterns): Allow moves to/from AR_M_REGS.
	(movdi patterns): Allow moves to/from p0.
	(call patterns): Move most setjmp hackery to ia64_gp_save_reg.
	(gr_spill, gr_restore): Indicate ar.unat read/written.
	(nonlocal_goto): Don't pass old frame_pointer.
	(nonlocal_goto_receiver): Remove.
	(exception_receiver): New.
	(builtin_setjmp_setup): New.
	(builtin_setjmp_receiver): New.
	* config/ia64/lib1funcs.asm (__ia64_save_stack_nonlocal): Bundle.
	(__ia64_nonlocal_goto): Bundle.  Don't kill r7.
	(__ia64_restore_stack_nonlocal): Likewise.
	(__ia64_trampoline): New.
	* config/ia64/sysv4.h (DBX_REGISTER_NUMBER): Defer to out of line
	function.
	* config/ia64/t-ia64 (LIB1ASMFUNCS): Add __trampoline.

From-SVN: r35568
parent ee715245
2000-08-08 Richard Henderson <rth@cygnus.com>
* config/ia64/ia64-protos.h: Remove duplicates. Update
for massive code rearrangements.
* config/ia64/ia64.c (ia64_arpfs_regno): Remove.
(ia64_rp_regno, ia64_fp_regno, ia64_input_regs): Remove.
(ia64_local_regs, ia64_need_regstk): Remove.
(ar_ccv_reg_operand): New.
(ia64_gp_save_reg): New.
(struct ia64_frame_info): Combine most of the size elements;
add new gr save elements.
(find_gr_spill): New.
(next_scratch_gr_reg): New.
(mark_reg_gr_used_mask): New.
(ia64_compute_frame_size): Rewrite. Allocate special AR regs
to GR backing store regs when possible.
(ia64_initial_elimination_offset): New.
(ia64_rap_fp_offset): Remove.
(save_restore_insns): Remove.
(setup_spill_pointers): New.
(finish_spill_pointers): New.
(spill_restore_mem): New.
(do_spill, do_restore): New.
(ia64_expand_prologue): Rewrite to use them.
(ia64_expand_epilogue): Likewise.
(ia64_direct_return): Update for current_frame_info changes.
(ia64_function_prologue): Simplify .prologue emission. Emit
.spill when needed.
(ia64_setup_incoming_varargs): Don't ever emit rtl.
(ia64_dbx_register_number): New.
(ia64_initialize_trampoline): New.
(ia64_secondary_reload_class): Request GR_REGS for integer
arithmetic destined for FR_REGS.
(ia64_init_machine_status): Don't reset return_address_pointer_rtx.
(ia64_mark_machine_status): Mark ia64_gp_save.
(rws_access_regno): Rename from rws_access_reg; don't treat
predicates specially.
(rws_access_reg): New. Update all callers.
(rtx_needs_barrier): Remove dead unspecs.
(ia64_epilogue_uses): Mark ar.pfs and ar.unat live on exit.
(ia64_encode_section_info): Silence signed/unsigned warnings.
(spill_offset, sp_offset, spill_offset_emitted): Remove.
(tmp_reg, tmp_saved): Remove.
(process_set): Rewrite to expect complicated bits via
REG_FRAME_RELATED_EXPR.
(ia64_expand_fetch_and_op): Use emit_move_insn; be explicit
in the use of ar.ccv; never set RTX_UNCHANGING_P.
(ia64_expand_op_and_fetch): Likewise.
(ia64_expand_compare_and_swap): Likewise.
(ia64_expand_builtin): Likewise.
* config/ia64/ia64.h (AR_UNAT_REGNUM): New.
(FIRST_PSEUDO_REGISTER): Update.
(AR_M_REGNO_P): Update.
(FIXED_REGS): Don't mark three local registers as used.
(EXTRA_CC_MODES): New.
(SELECT_CC_MODE): New.
(HARD_REGNO_NREGS): Allow DImode in p0; handle CCImode.
(HARD_REGNO_MODE_OK): Disallow CCImode from non-predicates.
(FRAME_GROWS_DOWNWARD): Unset.
(STARTING_FRAME_OFFSET): Zero.
(ELIMINABLE_REGS): Eliminate from the soft to hard frame pointer.
(INITIAL_ELIMINATION_OFFSET): Defer to out of line function.
(HARD_FRAME_POINTER_REGNUM): New.
(CAN_DEBUG_WITHOUT_FP): Define.
(TRAMPOLINE_TEMPLATE): Remove.
(TRAMPOLINE_SIZE): Lower to 32.
(TRAMPOLINE_ALIGNMENT): Lower to 64.
(INITIALIZE_TRAMPOLINE): Defer to out of line function.
(PREDICATE_CODES): Update.
(struct machine_function): Add ia64_gp_save.
* config/ia64/ia64.md: Purge unused unspecs.
(movsi patterns): Allow moves to/from AR_M_REGS.
(movdi patterns): Allow moves to/from p0.
(call patterns): Move most setjmp hackery to ia64_gp_save_reg.
(gr_spill, gr_restore): Indicate ar.unat read/written.
(nonlocal_goto): Don't pass old frame_pointer.
(nonlocal_goto_receiver): Remove.
(exception_receiver): New.
(builtin_setjmp_setup): New.
(builtin_setjmp_receiver): New.
* config/ia64/lib1funcs.asm (__ia64_save_stack_nonlocal): Bundle.
(__ia64_nonlocal_goto): Bundle. Don't kill r7.
(__ia64_restore_stack_nonlocal): Likewise.
(__ia64_trampoline): New.
* config/ia64/sysv4.h (DBX_REGISTER_NUMBER): Defer to out of line
function.
* config/ia64/t-ia64 (LIB1ASMFUNCS): Add __trampoline.
2000-08-08 Richard Henderson <rth@cygnus.com>
* frame.h (ia64_frame_state): Add my_psp.
* libgcc2.c (ia64_throw_helper): Add throw_sp argument.
(__throw): Pass it in. Don't clobber r7.
......
......@@ -50,18 +50,18 @@ extern int normal_comparison_operator PARAMS((rtx, enum machine_mode));
extern int adjusted_comparison_operator PARAMS((rtx, enum machine_mode));
extern int call_multiple_values_operation PARAMS((rtx, enum machine_mode));
extern int destination_operand PARAMS((rtx, enum machine_mode));
extern int ia64_rap_fp_offset PARAMS((void));
extern unsigned int ia64_compute_frame_size PARAMS((int));
extern void save_restore_insns PARAMS((int));
extern HOST_WIDE_INT ia64_initial_elimination_offset PARAMS((int, int));
extern void ia64_expand_prologue PARAMS((void));
extern void ia64_expand_epilogue PARAMS((void));
extern void ia64_function_prologue PARAMS((FILE *, int));
extern void ia64_funtion_epilogue PARAMS((FILE *, int));
extern void ia64_function_epilogue PARAMS((FILE *, int));
extern int ia64_direct_return PARAMS((void));
extern int predicate_operator PARAMS((rtx, enum machine_mode));
extern int ar_lc_reg_operand PARAMS((rtx, enum machine_mode));
extern int ar_ccv_reg_operand PARAMS((rtx, enum machine_mode));
extern int ia64_move_ok PARAMS((rtx, rtx));
extern rtx ia64_gp_save_reg PARAMS((int));
extern void ia64_expand_load_address PARAMS((rtx, rtx));
extern void ia64_expand_fetch_and_op PARAMS ((enum fetchop_code,
......@@ -69,6 +69,7 @@ extern void ia64_expand_fetch_and_op PARAMS ((enum fetchop_code,
extern void ia64_expand_op_and_fetch PARAMS ((enum fetchop_code,
enum machine_mode, rtx []));
extern void ia64_initialize_trampoline PARAMS((rtx, rtx, rtx));
extern void ia64_print_operand_address PARAMS((FILE *, rtx));
extern void ia64_print_operand PARAMS((FILE *, rtx, int));
extern enum reg_class ia64_secondary_reload_class PARAMS((enum reg_class,
......@@ -107,17 +108,10 @@ extern void ia64_encode_section_info PARAMS((tree));
extern int ia64_register_move_cost PARAMS((enum reg_class, enum reg_class));
extern int ia64_epilogue_uses PARAMS((int));
extern void ia64_file_start PARAMS((FILE *));
extern void ia64_expand_prologue PARAMS((void));
extern void ia64_expand_epilogue PARAMS((void));
extern void ia64_function_prologue PARAMS((FILE *, int));
extern void ia64_output_end_prologue PARAMS((FILE *));
extern void ia64_function_epilogue PARAMS((FILE *, int));
extern int ia64_direct_return PARAMS((void));
extern int ia64_rap_fp_offset PARAMS((void));
extern void ia64_init_builtins PARAMS((void));
extern void ia64_override_options PARAMS((void));
extern unsigned int ia64_compute_frame_size PARAMS((int));
extern void save_restore_insns PARAMS((int));
extern int ia64_dbx_register_number PARAMS((int));
/* ??? Flag defined in toplev.c, for ia64.md -fssa hack. */
extern int flag_ssa;
......@@ -563,33 +563,43 @@ __umodsi3:
.global __ia64_save_stack_nonlocal
.proc __ia64_save_stack_nonlocal
__ia64_save_stack_nonlocal:
alloc r18=ar.pfs,2,0,0,0
st8 [in0]=in1,8
mov r19=ar.rsc
;;
flushrs
and r19=0x1c,r19
mov ar.pfs=r18
;;
mov ar.rsc=r19
mov r16=ar.bsp
adds r2=16,in0
;;
mov r17=ar.rnat
st8 [in0]=r16,8
or r19=0x3,r19
;;
st8 [in0]=r17
mov ar.rsc=r19
st8 [r2]=r18
mov ar.pfs=r18
br.ret.sptk.few rp
;;
{ .mmf
alloc r18 = ar.pfs, 2, 0, 0, 0
mov r19 = ar.rsc
;;
}
{ .mmi
flushrs
st8 [in0] = in1, 24
and r19 = 0x1c, r19
;;
}
{ .mmi
st8 [in0] = r18, -16
mov ar.rsc = r19
or r19 = 0x3, r19
;;
}
{ .mmi
mov r16 = ar.bsp
mov r17 = ar.rnat
adds r2 = 8, in0
;;
}
{ .mmi
st8 [in0] = r16
st8 [r2] = r17
}
{ .mib
mov ar.rsc = r19
br.ret.sptk.few rp
;;
}
.endp __ia64_save_stack_nonlocal
#endif
#ifdef L__nonlocal_goto
// void __ia64_nonlocal_goto(void *fp, void *target_label, void *save_area,
// void __ia64_nonlocal_goto(void *target_label, void *save_area,
// void *static_chain);
.text
......@@ -597,35 +607,47 @@ __ia64_save_stack_nonlocal:
.global __ia64_nonlocal_goto
.proc __ia64_nonlocal_goto
__ia64_nonlocal_goto:
alloc r20=ar.pfs,4,0,0,0
mov r19=ar.rsc
adds r2=8,in2
ld8 r12=[in2],16
mov.ret.sptk rp = r33, .L0
;;
flushrs
ld8 r16=[r2],16
and r19=0x1c,r19
ld8 r17=[in2]
;;
ld8 r18=[r2]
mov ar.rsc=r19
;;
mov ar.bspstore=r16
;;
mov ar.rnat=r17
mov ar.pfs=r18
or r19=0x3,r19
;;
loadrs
invala
mov r7=r32
.L0: {
mov ar.rsc=r19
mov r15=r35
br.ret.sptk.few rp
{ .mmi
alloc r20 = ar.pfs, 3, 0, 0, 0
ld8 r12 = [in1], 8
mov.ret.sptk rp = in0, .L0
;;
}
{ .mmf
ld8 r16 = [in1], 8
mov r19 = ar.rsc
;;
}
{ .mmi
flushrs
ld8 r17 = [in1], 8
and r19 = 0x1c, r19
;;
}
{ .mmi
ld8 r18 = [in1]
mov ar.rsc = r19
or r19 = 0x3, r19
;;
}
{ .mmi
mov ar.bspstore = r16
;;
mov ar.rnat = r17
;;
}
{ .mmi
loadrs
invala
mov r15 = in2
;;
}
.L0: { .mib
mov ar.rsc = r19
mov ar.pfs = r18
br.ret.sptk.few rp
;;
}
;;
.endp __ia64_nonlocal_goto
#endif
......@@ -640,31 +662,84 @@ __ia64_nonlocal_goto:
.global __ia64_restore_stack_nonlocal
.proc __ia64_restore_stack_nonlocal
__ia64_restore_stack_nonlocal:
alloc r20=ar.pfs,4,0,0,0
mov r19=ar.rsc
adds r2=8,in0
ld8 r12=[in0],16
;;
flushrs
ld8 r16=[r2],16
and r19=0x1c,r19
ld8 r17=[in0]
;;
ld8 r18=[r2]
mov ar.rsc=r19
;;
mov ar.bspstore=r16
;;
mov ar.rnat=r17
mov ar.pfs=r18
or r19=0x3,r19
;;
loadrs
invala
.L0: {
mov ar.rsc=r19
br.ret.sptk.few rp
{ .mmf
alloc r20 = ar.pfs, 4, 0, 0, 0
ld8 r12 = [in0], 8
;;
}
{ .mmb
ld8 r16=[in0], 8
mov r19 = ar.rsc
;;
}
{ .mmi
flushrs
ld8 r17 = [in0], 8
and r19 = 0x1c, r19
;;
}
{ .mmf
ld8 r18 = [in0]
mov ar.rsc = r19
;;
}
{ .mmi
mov ar.bspstore = r16
;;
mov ar.rnat = r17
or r19 = 0x3, r19
;;
}
{ .mmf
loadrs
invala
;;
}
.L0: { .mib
mov ar.rsc = r19
mov ar.pfs = r18
br.ret.sptk.few rp
;;
}
;;
.endp __ia64_restore_stack_nonlocal
#endif
#ifdef L__trampoline
// Implement the nested function trampoline. This is out of line
// so that we don't have to bother with flushing the icache, as
// well as making the on-stack trampoline smaller.
//
// The trampoline has the following form:
//
// +-------------------+ \
// TRAMP: | __ia64_trampoline | |
// +-------------------+ > fake function descriptor
// | TRAMP+16 | |
// +-------------------+ /
// | target descriptor |
// +-------------------+
// | static link |
// +-------------------+
.text
.align 16
.global __ia64_trampoline
.proc __ia64_trampoline
__ia64_trampoline:
{ .mmi
ld8 r2 = [r1], 8
;;
ld8 r15 = [r1]
}
{ .mmi
ld8 r3 = [r2], 8
;;
ld8 r1 = [r2]
mov b6 = r3
}
{ .bbb
br.sptk.many b6
;;
}
.endp __ia64_trampoline
#endif
......@@ -115,14 +115,8 @@ while (0)
} while (0)
/* svr4.h undefines this, so we need to define it here. */
#define DBX_REGISTER_NUMBER(REGNO) \
(IN_REGNO_P (REGNO) ? (32 + (REGNO) - IN_REG (0)) \
: LOC_REGNO_P (REGNO) ? (32 + ia64_input_regs + \
(REGNO) - LOC_REG (0)) \
: OUT_REGNO_P (REGNO) ? (32 + ia64_input_regs + ia64_local_regs \
+ (REGNO) - OUT_REG (0)) \
: (REGNO) == FRAME_POINTER_REGNUM ? ia64_fp_regno \
: (REGNO))
#define DBX_REGISTER_NUMBER(REGNO) \
ia64_dbx_register_number(REGNO)
/* Things that svr4.h defines to the wrong type, because it assumes 32 bit
ints and 32 bit longs. */
......
......@@ -11,7 +11,7 @@ LIB1ASMSRC = ia64/lib1funcs.asm
LIB1ASMFUNCS = __divdf3 __divsf3 \
__divdi3 __moddi3 __udivdi3 __umoddi3 \
__divsi3 __modsi3 __udivsi3 __umodsi3 __save_stack_nonlocal \
__nonlocal_goto __restore_stack_nonlocal
__nonlocal_goto __restore_stack_nonlocal __trampoline
# ??? Hack to get -P option used when compiling lib1funcs.asm, because Intel
# assembler does not accept # line number as a comment.
......
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