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riscv-gcc-1
Commit 97c6f7ad by Ulrich Weigand Committed by Ulrich Weigand
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s390.md ("movti", [...]): Use 'o' instead of 'm' constraint in forced-split alternatives. 

	* config/s390/s390.md ("movti", "*movdi_31", "*movdf_31"): Use 'o' instead
	of 'm' constraint in forced-split alternatives.
	("*adddi3_31", "*subdi3_31"): Likewise.  Also, pass 0 instead of 1 as
	VALIDATE_ADDRESS parameter to operand_subword.
	* gcc.dg/20030321-1.c: New test.

From-SVN: r64718
parent b8c25665
Showing with 49 additions and 20 deletions
gcc/ChangeLog
2003-03-22 Ulrich Weigand <uweigand@de.ibm.com>
* config/s390/s390.md ("movti", "*movdi_31", "*movdf_31"): Use 'o' instead
of 'm' constraint in forced-split alternatives.
("*adddi3_31", "*subdi3_31"): Likewise. Also, pass 0 instead of 1 as
VALIDATE_ADDRESS parameter to operand_subword.
2003-03-22 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.c (notice_update_cc): Correctly handle
......
gcc/config/s390/s390.md
......@@ -904,8 +904,8 @@
;
(define_insn "movti"
[(set (match_operand:TI 0 "nonimmediate_operand" "=d,Q,d,m,Q")
(match_operand:TI 1 "general_operand" "Q,d,dKm,d,Q"))]
[(set (match_operand:TI 0 "nonimmediate_operand" "=d,Q,d,o,Q")
(match_operand:TI 1 "general_operand" "Q,d,dKo,d,Q"))]
"TARGET_64BIT"
"@
lmg\\t%0,%N0,%1
......@@ -1043,8 +1043,8 @@
(set_attr "type" "lr,load,store,floadd,floadd,fstored,cs")])
(define_insn "*movdi_31"
[(set (match_operand:DI 0 "nonimmediate_operand" "=d,Q,d,m,!*f,!*f,!m,Q")
(match_operand:DI 1 "general_operand" "Q,d,dKm,d,*f,m,*f,Q"))]
[(set (match_operand:DI 0 "nonimmediate_operand" "=d,Q,d,o,!*f,!*f,!m,Q")
(match_operand:DI 1 "general_operand" "Q,d,dKo,d,*f,m,*f,Q"))]
"!TARGET_64BIT"
"@
lm\\t%0,%N0,%1
......@@ -1353,8 +1353,8 @@
(set_attr "type" "floadd,floadd,fstored,lr,load,store,cs")])
(define_insn "*movdf_31"
[(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,m,d,Q,d,m,Q")
(match_operand:DF 1 "general_operand" "f,m,f,Q,d,dKm,d,Q"))]
[(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,m,d,Q,d,o,Q")
(match_operand:DF 1 "general_operand" "f,m,f,Q,d,dKo,d,Q"))]
"!TARGET_64BIT"
"@
ldr\\t%0,%1
......@@ -3034,7 +3034,7 @@
(define_insn_and_split "*adddi3_31"
[(set (match_operand:DI 0 "register_operand" "=&d")
(plus:DI (match_operand:DI 1 "nonimmediate_operand" "%0")
(match_operand:DI 2 "general_operand" "dm") ) )
(match_operand:DI 2 "general_operand" "do") ) )
(clobber (reg:CC 33))]
"!TARGET_64BIT"
"#"
......@@ -3055,12 +3055,12 @@
[(set (match_dup 3) (plus:SI (match_dup 3) (const_int 1)))
(clobber (reg:CC 33))])
(match_dup 9)]
"operands[3] = operand_subword (operands[0], 0, 1, DImode);
operands[4] = operand_subword (operands[1], 0, 1, DImode);
operands[5] = operand_subword (operands[2], 0, 1, DImode);
operands[6] = operand_subword (operands[0], 1, 1, DImode);
operands[7] = operand_subword (operands[1], 1, 1, DImode);
operands[8] = operand_subword (operands[2], 1, 1, DImode);
"operands[3] = operand_subword (operands[0], 0, 0, DImode);
operands[4] = operand_subword (operands[1], 0, 0, DImode);
operands[5] = operand_subword (operands[2], 0, 0, DImode);
operands[6] = operand_subword (operands[0], 1, 0, DImode);
operands[7] = operand_subword (operands[1], 1, 0, DImode);
operands[8] = operand_subword (operands[2], 1, 0, DImode);
operands[9] = gen_label_rtx ();"
[(set_attr "op_type" "NN")])
......@@ -3498,7 +3498,7 @@
(define_insn_and_split "*subdi3_31"
[(set (match_operand:DI 0 "register_operand" "=&d")
(minus:DI (match_operand:DI 1 "register_operand" "0")
(match_operand:DI 2 "general_operand" "dm") ) )
(match_operand:DI 2 "general_operand" "do") ) )
(clobber (reg:CC 33))]
"!TARGET_64BIT"
"#"
......@@ -3519,12 +3519,12 @@
[(set (match_dup 3) (plus:SI (match_dup 3) (const_int -1)))
(clobber (reg:CC 33))])
(match_dup 9)]
"operands[3] = operand_subword (operands[0], 0, 1, DImode);
operands[4] = operand_subword (operands[1], 0, 1, DImode);
operands[5] = operand_subword (operands[2], 0, 1, DImode);
operands[6] = operand_subword (operands[0], 1, 1, DImode);
operands[7] = operand_subword (operands[1], 1, 1, DImode);
operands[8] = operand_subword (operands[2], 1, 1, DImode);
"operands[3] = operand_subword (operands[0], 0, 0, DImode);
operands[4] = operand_subword (operands[1], 0, 0, DImode);
operands[5] = operand_subword (operands[2], 0, 0, DImode);
operands[6] = operand_subword (operands[0], 1, 0, DImode);
operands[7] = operand_subword (operands[1], 1, 0, DImode);
operands[8] = operand_subword (operands[2], 1, 0, DImode);
operands[9] = gen_label_rtx ();"
[(set_attr "op_type" "NN")])
......
gcc/testsuite/ChangeLog
2003-03-22 Ulrich Weigand <uweigand@de.ibm.com>
* gcc.dg/20030321-1.c: New test.
2003-03-22 Zack Weinberg <zack@codesourcery.com>
* gcc.dg/Wshadow-1.c: Add a dg-warning line.
......
gcc/testsuite/gcc.dg/20030321-1.c 0 → 100644
/* This used to ICE on s390 due to displacement overflow
when accessing the low-order subword. */
/* { dg-do compile } */
/* { dg-options "" } */
struct array
{
char align[4092];
long long elem[2] __attribute__ ((__packed__));
};
long long
test (struct array *array, int i)
{
return array->elem[i];
}
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