Commit 97a988bc by Bernd Schmidt Committed by Bernd Schmidt

bfin.h (splitting_loops): Declare.

	* config/bfin/bfin.h (splitting_loops): Declare.
	* config/bfin/bfin-protos.h (WA_05000257, WA_05000283, WA_05000315):
	Reorder bit definitions to be ascending.
	(WA_LOAD_LCREGS, ENABLE_WA_LOAD_LCREGS): New macros.
	* config/bfin/bfin.c (splitting_loops): New variable.
	(bfin_cpus): Add WA_LOAD_LCREGS as needed.
	(struct loop_info): Remove members INIT and LOOP_INIT.
	(bfin_optimize_loop): Don't set them.  Reorder the code that generates
	the LSETUP sequence.  Allow LC to be loaded from any register, but also
	add a case to push/pop a PREG scratch if ENABLE_WA_LOAD_LCREGS.
	(bfin_reorg_loops): When done, split all BB_ENDs with splitting_loops
	set to 1.
	* config/bfin/bfin.md (loop_end splitter): Use splitting_loops instead
	of reload_completed.
	From Jie Zhang:
	* config/bfin/bfin.md (movsi_insn): Refine constraints.

From-SVN: r146971
parent 1933c497
2009-04-29 Bernd Schmidt <bernd.schmidt@analog.com>
* config/bfin/bfin.h (splitting_loops): Declare.
* config/bfin/bfin-protos.h (WA_05000257, WA_05000283, WA_05000315):
Reorder bit definitions to be ascending.
(WA_LOAD_LCREGS, ENABLE_WA_LOAD_LCREGS): New macros.
* config/bfin/bfin.c (splitting_loops): New variable.
(bfin_cpus): Add WA_LOAD_LCREGS as needed.
(struct loop_info): Remove members INIT and LOOP_INIT.
(bfin_optimize_loop): Don't set them. Reorder the code that generates
the LSETUP sequence. Allow LC to be loaded from any register, but also
add a case to push/pop a PREG scratch if ENABLE_WA_LOAD_LCREGS.
(bfin_reorg_loops): When done, split all BB_ENDs with splitting_loops
set to 1.
* config/bfin/bfin.md (loop_end splitter): Use splitting_loops instead
of reload_completed.
From Jie Zhang:
* config/bfin/bfin.md (movsi_insn): Refine constraints.
2009-04-29 Rafael Avila de Espindola <espindola@google.com> 2009-04-29 Rafael Avila de Espindola <espindola@google.com>
* Makefile.in (PLUGIN_VERSION_H): New. * Makefile.in (PLUGIN_VERSION_H): New.
......
...@@ -80,18 +80,23 @@ extern unsigned int bfin_workarounds; ...@@ -80,18 +80,23 @@ extern unsigned int bfin_workarounds;
#define ENABLE_WA_INDIRECT_CALLS \ #define ENABLE_WA_INDIRECT_CALLS \
((bfin_workarounds & WA_INDIRECT_CALLS) && !TARGET_ICPLB) ((bfin_workarounds & WA_INDIRECT_CALLS) && !TARGET_ICPLB)
#define WA_05000257 0x00000040 #define WA_05000257 0x00000010
#define ENABLE_WA_05000257 \ #define ENABLE_WA_05000257 \
(bfin_workarounds & WA_05000257) (bfin_workarounds & WA_05000257)
#define WA_05000283 0x00000010 #define WA_05000283 0x00000020
#define ENABLE_WA_05000283 \ #define ENABLE_WA_05000283 \
(bfin_workarounds & WA_05000283) (bfin_workarounds & WA_05000283)
#define WA_05000315 0x00000020 #define WA_05000315 0x00000040
#define ENABLE_WA_05000315 \ #define ENABLE_WA_05000315 \
(bfin_workarounds & WA_05000315) (bfin_workarounds & WA_05000315)
/* For the anomaly 05-00-0312 */
#define WA_LOAD_LCREGS 0x00000080
#define ENABLE_WA_LOAD_LCREGS \
(bfin_workarounds & WA_LOAD_LCREGS)
#define Mmode enum machine_mode #define Mmode enum machine_mode
extern rtx function_arg (CUMULATIVE_ARGS *, Mmode, tree, int); extern rtx function_arg (CUMULATIVE_ARGS *, Mmode, tree, int);
......
...@@ -1322,7 +1322,7 @@ extern struct rtx_def *bfin_cc_rtx, *bfin_rets_rtx; ...@@ -1322,7 +1322,7 @@ extern struct rtx_def *bfin_cc_rtx, *bfin_rets_rtx;
#define SIZE_ASM_OP "\t.size\t" #define SIZE_ASM_OP "\t.size\t"
extern int splitting_for_sched; extern int splitting_for_sched, splitting_loops;
#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) ((CHAR) == '!') #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) ((CHAR) == '!')
......
...@@ -532,20 +532,22 @@ ...@@ -532,20 +532,22 @@
;; with a PLUS. We generally require fewer secondary reloads this way. ;; with a PLUS. We generally require fewer secondary reloads this way.
(define_insn "*movsi_insn" (define_insn "*movsi_insn"
[(set (match_operand:SI 0 "nonimmediate_operand" "=da,x*y,da,x,x,x,da,mr") [(set (match_operand:SI 0 "nonimmediate_operand" "=da,x,da,y,da,x,x,x,da,mr")
(match_operand:SI 1 "general_operand" "da,x*y,xKs7,xKsh,xKuh,ix,mr,da"))] (match_operand:SI 1 "general_operand" "da,x,y,da,xKs7,xKsh,xKuh,ix,mr,da"))]
"GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) == REG" "GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) == REG"
"@ "@
%0 = %1; %0 = %1;
%0 = %1; %0 = %1;
%0 = %1;
%0 = %1;
%0 = %1 (X); %0 = %1 (X);
%0 = %1 (X); %0 = %1 (X);
%0 = %1 (Z); %0 = %1 (Z);
# #
%0 = %1%! %0 = %1%!
%0 = %1%!" %0 = %1%!"
[(set_attr "type" "move,move,mvi,mvi,mvi,*,mcld,mcst") [(set_attr "type" "move,move,move,move,mvi,mvi,mvi,*,mcld,mcst")
(set_attr "length" "2,2,2,4,4,*,*,*")]) (set_attr "length" "2,2,2,2,2,4,4,*,*,*")])
(define_insn "*movsi_insn32" (define_insn "*movsi_insn32"
[(set (match_operand:SI 0 "register_operand" "=d,d") [(set (match_operand:SI 0 "register_operand" "=d,d")
...@@ -1908,7 +1910,7 @@ ...@@ -1908,7 +1910,7 @@
(const_int -1))) (const_int -1)))
(unspec [(const_int 0)] UNSPEC_LSETUP_END) (unspec [(const_int 0)] UNSPEC_LSETUP_END)
(clobber (match_scratch:SI 2 "=&r"))] (clobber (match_scratch:SI 2 "=&r"))]
"reload_completed" "splitting_loops"
[(set (match_dup 2) (match_dup 0)) [(set (match_dup 2) (match_dup 0))
(set (match_dup 2) (plus:SI (match_dup 2) (const_int -1))) (set (match_dup 2) (plus:SI (match_dup 2) (const_int -1)))
(set (match_dup 0) (match_dup 2)) (set (match_dup 0) (match_dup 2))
......
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