ddg: Use rtx_insn

gcc/
	* ddg.h (struct ddg_node): Strengthen fields "insn" and
	"first_note" from rtx to rtx_insn *.
	(get_node_of_insn): Likewise for param 2 "insn".
	(autoinc_var_is_used_p): Likewise for params "def_insn" and "use_insn".

	* ddg.c (mem_read_insn_p): Strengthen param "insn" from rtx to
	rtx_insn *.
	(mem_write_insn_p): Likewise.
	(mem_access_insn_p): Likewise.
	(autoinc_var_is_used_p): Likewise for params "def_insn" and "use_insn".
	(def_has_ccmode_p): Likewise for param "insn".
	(add_cross_iteration_register_deps): Likewise for locals
	"def_insn" and "use_insn".
	(insns_may_alias_p): Likewise for params "insn1" and "insn2".
	(build_intra_loop_deps): Likewise for local "src_insn".
	(create_ddg): Strengthen locals "insn" and "first_note" from rtx
	to rtx_insn *.
	(get_node_of_insn): Likewise for param "insn".

From-SVN: r214317

gcc/ChangeLog

 2014-08-22  David Malcolm  <dmalcolm@redhat.com>
 
+	* ddg.h (struct ddg_node): Strengthen fields "insn" and
+	"first_note" from rtx to rtx_insn *.
+	(get_node_of_insn): Likewise for param 2 "insn".
+	(autoinc_var_is_used_p): Likewise for params "def_insn" and "use_insn".
+
+	* ddg.c (mem_read_insn_p): Strengthen param "insn" from rtx to
+	rtx_insn *.
+	(mem_write_insn_p): Likewise.
+	(mem_access_insn_p): Likewise.
+	(autoinc_var_is_used_p): Likewise for params "def_insn" and "use_insn".
+	(def_has_ccmode_p): Likewise for param "insn".
+	(add_cross_iteration_register_deps): Likewise for locals
+	"def_insn" and "use_insn".
+	(insns_may_alias_p): Likewise for params "insn1" and "insn2".
+	(build_intra_loop_deps): Likewise for local "src_insn".
+	(create_ddg): Strengthen locals "insn" and "first_note" from rtx
+	to rtx_insn *.
+	(get_node_of_insn): Likewise for param "insn".
+
+2014-08-22  David Malcolm  <dmalcolm@redhat.com>
+
 	* dce.c (worklist): Strengthen from vec<rtx> to vec<rtx_insn *>.
 	(deletable_insn_p): Strengthen param "insn" from rtx to
 	rtx_insn *.  Add checked cast to rtx_call_insn when invoking

gcc/ddg.c

@@ -80,7 +80,7 @@ mark_mem_use_1 (rtx *x, void *data)
 
 /* Returns nonzero if INSN reads from memory.  */
 static bool
-mem_read_insn_p (rtx insn)
+mem_read_insn_p (rtx_insn *insn)
 {
   mem_ref_p = false;
   note_uses (&PATTERN (insn), mark_mem_use_1, NULL);
@@ -96,7 +96,7 @@ mark_mem_store (rtx loc, const_rtx setter ATTRIBUTE_UNUSED, void *data ATTRIBUTE
 
 /* Returns nonzero if INSN writes to memory.  */
 static bool
-mem_write_insn_p (rtx insn)
+mem_write_insn_p (rtx_insn *insn)
 {
   mem_ref_p = false;
   note_stores (PATTERN (insn), mark_mem_store, NULL);
@@ -138,7 +138,7 @@ rtx_mem_access_p (rtx x)
 
 /* Returns nonzero if INSN reads to or writes from memory.  */
 static bool
-mem_access_insn_p (rtx insn)
+mem_access_insn_p (rtx_insn *insn)
 {
   return rtx_mem_access_p (PATTERN (insn));
 }
@@ -152,7 +152,7 @@ mem_access_insn_p (rtx insn)
    by use_insn, if use_insn uses an address register auto-inc'ed by
    def_insn.  */
 bool
-autoinc_var_is_used_p (rtx def_insn, rtx use_insn)
+autoinc_var_is_used_p (rtx_insn *def_insn, rtx_insn *use_insn)
 {
   rtx note;
 
@@ -167,7 +167,7 @@ autoinc_var_is_used_p (rtx def_insn, rtx use_insn)
 /* Return true if one of the definitions in INSN has MODE_CC.  Otherwise
    return false.  */
 static bool
-def_has_ccmode_p (rtx insn)
+def_has_ccmode_p (rtx_insn *insn)
 {
   df_ref def;
 
@@ -293,7 +293,7 @@ add_cross_iteration_register_deps (ddg_ptr g, df_ref last_def)
   int regno = DF_REF_REGNO (last_def);
   struct df_link *r_use;
   int has_use_in_bb_p = false;
-  rtx def_insn = DF_REF_INSN (last_def);
+  rtx_insn *def_insn = DF_REF_INSN (last_def);
   ddg_node_ptr last_def_node = get_node_of_insn (g, def_insn);
   ddg_node_ptr use_node;
 #ifdef ENABLE_CHECKING
@@ -313,7 +313,7 @@ add_cross_iteration_register_deps (ddg_ptr g, df_ref last_def)
   /* Create inter-loop true dependences and anti dependences.  */
   for (r_use = DF_REF_CHAIN (last_def); r_use != NULL; r_use = r_use->next)
     {
-      rtx use_insn = DF_REF_INSN (r_use->ref);
+      rtx_insn *use_insn = DF_REF_INSN (r_use->ref);
 
       if (BLOCK_FOR_INSN (use_insn) != g->bb)
 	continue;
@@ -429,7 +429,7 @@ walk_mems_1 (rtx *x, rtx *pat)
 
 /* Return 1 if two specified instructions have mem expr with conflict alias sets*/
 static int
-insns_may_alias_p (rtx insn1, rtx insn2)
+insns_may_alias_p (rtx_insn *insn1, rtx_insn *insn2)
 {
   /* For each pair of MEMs in INSN1 and INSN2 check their independence.  */
   return  for_each_rtx (&PATTERN (insn1), (rtx_function) walk_mems_1,
@@ -530,7 +530,7 @@ build_intra_loop_deps (ddg_ptr g)
 
       FOR_EACH_DEP (dest_node->insn, SD_LIST_BACK, sd_it, dep)
 	{
-	  rtx src_insn = DEP_PRO (dep);
+	  rtx_insn *src_insn = DEP_PRO (dep);
 	  ddg_node_ptr src_node;
 
 	  /* Don't add dependencies on debug insns to non-debug insns
@@ -594,7 +594,7 @@ ddg_ptr
 create_ddg (basic_block bb, int closing_branch_deps)
 {
   ddg_ptr g;
-  rtx insn, first_note;
+  rtx_insn *insn, *first_note;
   int i;
   int num_nodes = 0;
 
@@ -634,7 +634,7 @@ create_ddg (basic_block bb, int closing_branch_deps)
   g->nodes = (ddg_node_ptr) xcalloc (num_nodes, sizeof (struct ddg_node));
   g->closing_branch = NULL;
   i = 0;
-  first_note = NULL_RTX;
+  first_note = NULL;
   for (insn = BB_HEAD (bb); insn != NEXT_INSN (BB_END (bb));
        insn = NEXT_INSN (insn))
     {
@@ -664,7 +664,7 @@ create_ddg (basic_block bb, int closing_branch_deps)
       bitmap_clear (g->nodes[i].predecessors);
       g->nodes[i].first_note = (first_note ? first_note : insn);
       g->nodes[i++].insn = insn;
-      first_note = NULL_RTX;
+      first_note = NULL;
     }
 
   /* We must have found a branch in DDG.  */
@@ -957,7 +957,7 @@ add_scc_to_ddg (ddg_all_sccs_ptr g, ddg_scc_ptr scc)
 
 /* Given the instruction INSN return the node that represents it.  */
 ddg_node_ptr
-get_node_of_insn (ddg_ptr g, rtx insn)
+get_node_of_insn (ddg_ptr g, rtx_insn *insn)
 {
   int i;
 

gcc/ddg.h

@@ -51,13 +51,13 @@ struct ddg_node
   int cuid;
 
   /* The insn represented by the node.  */
-  rtx insn;
+  rtx_insn *insn;
 
   /* A note preceding INSN (or INSN itself), such that all insns linked
      from FIRST_NOTE until INSN (inclusive of both) are moved together
      when reordering the insns.  This takes care of notes that should
      continue to precede INSN.  */
-  rtx first_note;
+  rtx_insn *first_note;
 
   /* Incoming and outgoing dependency edges.  */
   ddg_edge_ptr in;
@@ -173,7 +173,7 @@ void vcg_print_ddg (FILE *, ddg_ptr);
 void print_ddg_edge (FILE *, ddg_edge_ptr);
 void print_sccs (FILE *, ddg_all_sccs_ptr, ddg_ptr);
 
-ddg_node_ptr get_node_of_insn (ddg_ptr, rtx);
+ddg_node_ptr get_node_of_insn (ddg_ptr, rtx_insn *);
 
 void find_successors (sbitmap result, ddg_ptr, sbitmap);
 void find_predecessors (sbitmap result, ddg_ptr, sbitmap);
@@ -184,6 +184,6 @@ void free_ddg_all_sccs (ddg_all_sccs_ptr);
 int find_nodes_on_paths (sbitmap result, ddg_ptr, sbitmap from, sbitmap to);
 int longest_simple_path (ddg_ptr, int from, int to, sbitmap via);
 
-bool autoinc_var_is_used_p (rtx, rtx);
+bool autoinc_var_is_used_p (rtx_insn *, rtx_insn *);
 
 #endif /* GCC_DDG_H */