re PR middle-end/37908 (atomic NAND op generate wrong code;…

re PR middle-end/37908 (atomic NAND op generate wrong code; __sync_nand_and_fetch, __sync_fetch_and_nand)

	PR middle-end/37908
	* config/ia64/ia64.c (ia64_expand_atomic_ope): Properly handle NAND
	case by calculating ~(new_reg & val) instead of (~new_reg & val).
	* config/ia64/sync.md (sync_nand<mode>): Change insn RTX
	to (not:IMODE (and:IMODE (...))).
	(sync_old_nand<mode>): Ditto.
	(sync_new_nand<mode>): Ditto.

From-SVN: r142082

gcc/ChangeLog

+2008-11-21  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR middle-end/37908
+	* config/ia64/ia64.c (ia64_expand_atomic_ope): Properly handle NAND
+	case by calculating ~(new_reg & val) instead of (~new_reg & val).
+	* config/ia64/sync.md (sync_nand<mode>): Change insn RTX
+	to (not:IMODE (and:IMODE (...))).
+	(sync_old_nand<mode>): Ditto.
+	(sync_new_nand<mode>): Ditto.
+
 2008-11-20  Joseph Myers  <joseph@codesourcery.com>
 
 	* config/arm/thumb2.md (thumb2_casesi_internal,
-	thumb2_casesi_internal_pic): Use earlyclobber for scratch operand
-	4.
+	thumb2_casesi_internal_pic): Use earlyclobber for scratch operand 4.
 
 2008-11-20  Andreas Krebbel  <krebbel1@de.ibm.com>
 
@@ -102,8 +111,7 @@
 
 	PR bootstrap/37790
 	* ira-int.h (ira_copy_allocno_live_range_list,
-	ira_merge_allocno_live_ranges,
-	ira_allocno_live_ranges_intersect_p,
+	ira_merge_allocno_live_ranges, ira_allocno_live_ranges_intersect_p,
 	ira_finish_allocno_live_range_list): New prototypes.
 	(ira_allocno_live_ranges_intersect_p,
 	ira_pseudo_live_ranges_intersect_p): Remove.
@@ -176,6 +184,7 @@
 	are only reductions.
 
 2008-11-19  Hariharan Sandanagobalane <hariharan@picochip.com>
+
 	* config/picochip/picochip.c (headers): Remove an unnecessary
 	header file.
 

gcc/config/ia64/ia64.c

@@ -2141,11 +2141,13 @@ ia64_expand_atomic_op (enum rtx_code code, rtx mem, rtx val,
   new_reg = cmp_reg;
   if (code == NOT)
     {
-      new_reg = expand_simple_unop (DImode, NOT, new_reg, NULL_RTX, true);
-      code = AND;
+      new_reg = expand_simple_binop (DImode, AND, new_reg, val, NULL_RTX,
+				     true, OPTAB_DIRECT);
+      new_reg = expand_simple_unop (DImode, code, new_reg, NULL_RTX, true);
     }
-  new_reg = expand_simple_binop (DImode, code, new_reg, val, NULL_RTX,
-				 true, OPTAB_DIRECT);
+  else
+    new_reg = expand_simple_binop (DImode, code, new_reg, val, NULL_RTX,
+				   true, OPTAB_DIRECT);
 
   if (mode != DImode)
     new_reg = gen_lowpart (mode, new_reg);

gcc/config/ia64/sync.md

@@ -57,8 +57,9 @@
 
 (define_expand "sync_nand<mode>"
   [(set (match_operand:IMODE 0 "memory_operand" "")
-	(and:IMODE (not:IMODE (match_dup 0))
-	  (match_operand:IMODE 1 "general_operand" "")))]
+	(not:IMODE
+	  (and:IMODE (match_dup 0)
+		     (match_operand:IMODE 1 "general_operand" ""))))]
   ""
 {
   ia64_expand_atomic_op (NOT, operands[0], operands[1], NULL, NULL);
@@ -78,9 +79,9 @@
 
 (define_expand "sync_old_nand<mode>"
   [(set (match_operand:IMODE 0 "gr_register_operand" "")
-	(and:IMODE 
-	  (not:IMODE (match_operand:IMODE 1 "memory_operand" ""))
-	  (match_operand:IMODE 2 "general_operand" "")))]
+	(not:IMODE 
+	  (and:IMODE (match_operand:IMODE 1 "memory_operand" "")
+		     (match_operand:IMODE 2 "general_operand" ""))))]
   ""
 {
   ia64_expand_atomic_op (NOT, operands[1], operands[2], operands[0], NULL);
@@ -100,9 +101,9 @@
 
 (define_expand "sync_new_nand<mode>"
   [(set (match_operand:IMODE 0 "gr_register_operand" "")
-	(and:IMODE 
-	  (not:IMODE (match_operand:IMODE 1 "memory_operand" ""))
-	  (match_operand:IMODE 2 "general_operand" "")))]
+	(not:IMODE 
+	  (and:IMODE (match_operand:IMODE 1 "memory_operand" "")
+		     (match_operand:IMODE 2 "general_operand" ""))))]
   ""
 {
   ia64_expand_atomic_op (NOT, operands[1], operands[2], NULL, operands[0]);

gcc/testsuite/ChangeLog

@@ -15,7 +15,7 @@
 	memcpy optimized into ref-all store.
 	* gcc.dg/pr29215.c: New test.
 
-2008-11-19  Uros Bizjak  <ubizjak@gmail.com>
+2008-11-20  Uros Bizjak  <ubizjak@gmail.com>
 
 	PR target/38151
 	* gcc.target/i386/pr38151-1.c: New test.