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Commit 96a3900d by Zack Weinberg Committed by Zack Weinberg
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config.gcc: Delete stanza for arm-semi-aof and armel-semi-aof targets. 

	* config.gcc: Delete stanza for arm-semi-aof and
	armel-semi-aof targets.
	* config/arm/arm-protos.h
	* config/arm/arm.c
	* config/arm/arm.h: Delete all #ifdef AOF_ASSEMBLER blocks;
	make all #ifndef AOF_ASSEMBLER blocks unconditional.  Also
	delete aof_pic_label and remove mention of AOF in comments.
	* config/arm/arm.md: Delete patterns used only for AOF assembly.
	* config/arm/aof.h
	* config/arm/semiaof.h
	* config/arm/t-semi: Delete file.

From-SVN: r128052
parent b1d5455a
Showing with 15 additions and 134 deletions
gcc/ChangeLog
2007-09-03 Zack Weinberg <zack@codesourcery.com>
* config.gcc: Delete stanza for arm-semi-aof and
armel-semi-aof targets.
* config/arm/arm-protos.h
* config/arm/arm.c
* config/arm/arm.h: Delete all #ifdef AOF_ASSEMBLER blocks;
make all #ifndef AOF_ASSEMBLER blocks unconditional. Also
delete aof_pic_label and remove mention of AOF in comments.
* config/arm/arm.md: Delete patterns used only for AOF assembly.
* config/arm/aof.h
* config/arm/semiaof.h
* config/arm/t-semi: Delete file.
2007-09-03 Kaveh R. Ghazi <ghazi@caip.rutgers.edu> 2007-09-03 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* system.h (CONST_CAST2, CONST_CAST_TREE, CONST_CAST_RTX, * system.h (CONST_CAST2, CONST_CAST_TREE, CONST_CAST_RTX,
......
gcc/config.gcc
...@@ -700,10 +700,6 @@ arm-*-coff* | armel-*-coff*) ...@@ -700,10 +700,6 @@ arm-*-coff* | armel-*-coff*)
tm_file="arm/semi.h arm/aout.h arm/arm.h arm/coff.h dbxcoff.h" tm_file="arm/semi.h arm/aout.h arm/arm.h arm/coff.h dbxcoff.h"
tmake_file="arm/t-arm arm/t-arm-coff" tmake_file="arm/t-arm arm/t-arm-coff"
;; ;;
arm-semi-aof | armel-semi-aof)
tm_file="arm/semiaof.h arm/aof.h arm/arm.h"
tmake_file="arm/t-arm arm/t-semi"
;;
arm-wrs-vxworks) arm-wrs-vxworks)
tm_file="elfos.h arm/elf.h arm/aout.h ${tm_file} vx-common.h vxworks.h arm/vxworks.h" tm_file="elfos.h arm/elf.h arm/aout.h ${tm_file} vx-common.h vxworks.h arm/vxworks.h"
tmake_file="${tmake_file} arm/t-arm arm/t-vxworks" tmake_file="${tmake_file} arm/t-arm arm/t-vxworks"
......
gcc/config/arm/arm-protos.h
...@@ -163,13 +163,6 @@ extern rtx arm_function_value(const_tree, const_tree); ...@@ -163,13 +163,6 @@ extern rtx arm_function_value(const_tree, const_tree);
#endif #endif
extern int arm_apply_result_size (void); extern int arm_apply_result_size (void);
#if defined AOF_ASSEMBLER
extern rtx aof_pic_entry (rtx);
extern void aof_add_import (const char *);
extern void aof_delete_import (const char *);
extern void zero_init_section (void);
#endif /* AOF_ASSEMBLER */
#endif /* RTX_CODE */ #endif /* RTX_CODE */
extern int arm_float_words_big_endian (void); extern int arm_float_words_big_endian (void);
......
gcc/config/arm/arm.h
...@@ -132,8 +132,6 @@ extern rtx pool_vector_label; ...@@ -132,8 +132,6 @@ extern rtx pool_vector_label;
/* Set to 1 when a return insn is output, this means that the epilogue /* Set to 1 when a return insn is output, this means that the epilogue
is not needed. */ is not needed. */
extern int return_used_this_function; extern int return_used_this_function;
/* Used to produce AOF syntax assembler. */
extern GTY(()) rtx aof_pic_label;
/* Just in case configure has failed to define anything. */ /* Just in case configure has failed to define anything. */
#ifndef TARGET_CPU_DEFAULT #ifndef TARGET_CPU_DEFAULT
...@@ -1650,8 +1648,7 @@ typedef struct ...@@ -1650,8 +1648,7 @@ typedef struct
/* If your target environment doesn't prefix user functions with an /* If your target environment doesn't prefix user functions with an
underscore, you may wish to re-define this to prevent any conflicts. underscore, you may wish to re-define this to prevent any conflicts. */
e.g. AOF may prefix mcount with an underscore. */
#ifndef ARM_MCOUNT_NAME #ifndef ARM_MCOUNT_NAME
#define ARM_MCOUNT_NAME "*mcount" #define ARM_MCOUNT_NAME "*mcount"
#endif #endif
...@@ -1922,22 +1919,12 @@ typedef struct ...@@ -1922,22 +1919,12 @@ typedef struct
/* Recognize any constant value that is a valid address. */ /* Recognize any constant value that is a valid address. */
/* XXX We can address any constant, eventually... */ /* XXX We can address any constant, eventually... */
#ifdef AOF_ASSEMBLER
#define CONSTANT_ADDRESS_P(X) \
(GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X))
#else
/* ??? Should the TARGET_ARM here also apply to thumb2? */ /* ??? Should the TARGET_ARM here also apply to thumb2? */
#define CONSTANT_ADDRESS_P(X) \ #define CONSTANT_ADDRESS_P(X) \
(GET_CODE (X) == SYMBOL_REF \ (GET_CODE (X) == SYMBOL_REF \
&& (CONSTANT_POOL_ADDRESS_P (X) \ && (CONSTANT_POOL_ADDRESS_P (X) \
|| (TARGET_ARM && optimize > 0 && SYMBOL_REF_FLAG (X)))) || (TARGET_ARM && optimize > 0 && SYMBOL_REF_FLAG (X))))
#endif /* AOF_ASSEMBLER */
/* True if SYMBOL + OFFSET constants must refer to something within /* True if SYMBOL + OFFSET constants must refer to something within
SYMBOL's section. */ SYMBOL's section. */
#define ARM_OFFSETS_MUST_BE_WITHIN_SECTIONS_P 0 #define ARM_OFFSETS_MUST_BE_WITHIN_SECTIONS_P 0
......
gcc/config/arm/arm.md
...@@ -4849,39 +4849,6 @@ ...@@ -4849,39 +4849,6 @@
(set (attr "pool_range") (const_int 1024))] (set (attr "pool_range") (const_int 1024))]
) )
;; This variant is used for AOF assembly, since it needs to mention the
;; pic register in the rtl.
(define_expand "pic_load_addr_based"
[(set (match_operand:SI 0 "s_register_operand" "")
(unspec:SI [(match_operand 1 "" "") (match_dup 2)] UNSPEC_PIC_SYM))]
"TARGET_ARM && flag_pic"
"operands[2] = cfun->machine->pic_reg;"
)
(define_insn "*pic_load_addr_based_insn"
[(set (match_operand:SI 0 "s_register_operand" "=r")
(unspec:SI [(match_operand 1 "" "")
(match_operand 2 "s_register_operand" "r")]
UNSPEC_PIC_SYM))]
"TARGET_EITHER && flag_pic && operands[2] == cfun->machine->pic_reg"
"*
#ifdef AOF_ASSEMBLER
operands[1] = aof_pic_entry (operands[1]);
#endif
output_asm_insn (\"ldr%?\\t%0, %a1\", operands);
return \"\";
"
[(set_attr "type" "load1")
(set (attr "pool_range")
(if_then_else (eq_attr "is_thumb" "yes")
(const_int 1024)
(const_int 4096)))
(set (attr "neg_pool_range")
(if_then_else (eq_attr "is_thumb" "yes")
(const_int 0)
(const_int 4084)))]
)
(define_insn "pic_add_dot_plus_four" (define_insn "pic_add_dot_plus_four"
[(set (match_operand:SI 0 "register_operand" "=r") [(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(plus:SI (match_operand:SI 1 "register_operand" "0") (unspec:SI [(plus:SI (match_operand:SI 1 "register_operand" "0")
......
gcc/config/arm/semiaof.h deleted 100644 → 0
/* Definitions of target machine for GNU compiler. ARM on semi-hosted platform
AOF Syntax assembler.
Copyright (C) 1995, 1996, 1997, 2004, 2007 Free Software Foundation, Inc.
Contributed by Richard Earnshaw (richard.earnshaw@armltd.co.uk)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
License for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#define TARGET_OS_CPP_BUILTINS() \
do { \
builtin_define_std ("arm"); \
builtin_define_std ("semi"); \
} while (0)
#define ASM_SPEC "%{g -g} -arch 4 -apcs 3/32bit"
#define LIB_SPEC "%{Eb: armlib_h.32b%s}%{!Eb: armlib_h.32l%s}"
#define TARGET_VERSION fputs (" (ARM/semi-hosted)", stderr);
#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_HARD
#define TARGET_DEFAULT (0)
/* The Norcroft C library defines size_t as "unsigned int". */
#define SIZE_TYPE "unsigned int"
gcc/config/arm/t-semi deleted 100644 → 0
# Just for these, we omit the frame pointer since it makes such a big
# difference. It is then pointless adding debugging.
TARGET_LIBGCC2_CFLAGS = -fomit-frame-pointer
LIBGCC2_DEBUG_CFLAGS = -g0
LIB1ASMSRC = arm/lib1funcs.asm
LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _call_via_rX _interwork_call_via_rX
# We want fine grained libraries, so use the new code to build the
# floating point emulation libraries.
FPBIT = fp-bit.c
DPBIT = dp-bit.c
fp-bit.c: $(srcdir)/config/fp-bit.c
echo '#ifdef __SOFTFP__' > fp-bit.c
echo '#define FLOAT' >> fp-bit.c
echo '#ifndef __ARMEB__' >> fp-bit.c
echo '#define FLOAT_BIT_ORDER_MISMATCH' >> fp-bit.c
echo '#endif' >> fp-bit.c
cat $(srcdir)/config/fp-bit.c >> fp-bit.c
echo '#endif' >> fp-bit.c
dp-bit.c: $(srcdir)/config/fp-bit.c
echo '#ifdef __SOFTFP__' > dp-bit.c
echo '#ifndef __ARMEB__' >> dp-bit.c
echo '#define FLOAT_BIT_ORDER_MISMATCH' >> dp-bit.c
echo '#define FLOAT_WORD_ORDER_MISMATCH' >> dp-bit.c
echo '#endif' >> dp-bit.c
cat $(srcdir)/config/fp-bit.c >> dp-bit.c
echo '#endif' >> dp-bit.c
MULTILIB_OPTIONS = msoft-float mbig-endian mwords-little-endian
MULTILIB_DIRNAMES = soft big wlittle
MULTILIB_EXCEPTIONS = mwords-little-endian msoft-float/mwords-little-endian
LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib
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