* config/mips/mips-protos.h (mips_symbolic_constant_p)

	(mips_atomic_symbolic_constant_p, mips_stack_address_p)
	(mips_small_data_pattern_p): Declare.
	* config/mips/mips.h (CONST_GP_P): Moved from mips.c.
	(PREDICATE_CODES, SPECIAL_MODE_PREDICATES): Delete.
	* config/mips/mips.c (mips_symbolic_constant_p): Make global.
	(mips_atomic_symbolic_constant_p, mips_stack_address_p): New functions.
	(uns_arith_operand, const_arith_operand, arith_operand, sle_operand)
	(sleu_operand, small_int, reg_or_0_operand, const_float_1_operand)
	(reg_or_const_float_1_operand, hilo_operand, extend_operator)
	(macc_msac_operand, equality_op, cmp_op, trap_cmp_op)
	(pc_or_label_operand, call_insn_operand, move_operand)
	(consttable_operand, symbolic_operand, general_symbolic_operand)
	(global_got_operand, local_got_operand, stack_operand)
	(fp_register_operand, lo_operand, fcc_register_operand): Delete.
	(mips_small_data_pattern_1): Renamed from small_data_pattern_1.
	(mips_small_data_pattern_p): Replace previous small_data_pattern
	predicate.  Turn into a bool () (rtx) function.
	* config/mips/predicates.md: New file.
	* config/mips/mips.md: Include it.  Use the target-independent
	comparison_operator instead of cmp_op.  Rename trap_cmp_op to
	trap_comparison_operator and equality_op to equality_operator.
	Replace uses of small_int with the equivalent const_arith_operand.
	Rename reg_or_const_float_1_operand to reg_or_1_operand.  Rename
	const_float_1_operand to const_1_operand.  Rename fcc_register_operand
	to fcc_reload_operand.
	* config/mips/sb1.md: Rename fp_register_operand to fpr_operand.

From-SVN: r86006

gcc/ChangeLog

+2004-08-14  Richard Sandiford  <rsandifo@redhat.com>
+
+	* config/mips/mips-protos.h (mips_symbolic_constant_p)
+	(mips_atomic_symbolic_constant_p, mips_stack_address_p)
+	(mips_small_data_pattern_p): Declare.
+	* config/mips/mips.h (CONST_GP_P): Moved from mips.c.
+	(PREDICATE_CODES, SPECIAL_MODE_PREDICATES): Delete.
+	* config/mips/mips.c (mips_symbolic_constant_p): Make global.
+	(mips_atomic_symbolic_constant_p, mips_stack_address_p): New functions.
+	(uns_arith_operand, const_arith_operand, arith_operand, sle_operand)
+	(sleu_operand, small_int, reg_or_0_operand, const_float_1_operand)
+	(reg_or_const_float_1_operand, hilo_operand, extend_operator)
+	(macc_msac_operand, equality_op, cmp_op, trap_cmp_op)
+	(pc_or_label_operand, call_insn_operand, move_operand)
+	(consttable_operand, symbolic_operand, general_symbolic_operand)
+	(global_got_operand, local_got_operand, stack_operand)
+	(fp_register_operand, lo_operand, fcc_register_operand): Delete.
+	(mips_small_data_pattern_1): Renamed from small_data_pattern_1.
+	(mips_small_data_pattern_p): Replace previous small_data_pattern
+	predicate.  Turn into a bool () (rtx) function.
+	* config/mips/predicates.md: New file.
+	* config/mips/mips.md: Include it.  Use the target-independent
+	comparison_operator instead of cmp_op.  Rename trap_cmp_op to
+	trap_comparison_operator and equality_op to equality_operator.
+	Replace uses of small_int with the equivalent const_arith_operand.
+	Rename reg_or_const_float_1_operand to reg_or_1_operand.  Rename
+	const_float_1_operand to const_1_operand.  Rename fcc_register_operand
+	to fcc_reload_operand.
+	* config/mips/sb1.md: Rename fp_register_operand to fpr_operand.
+
 2004-08-14  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 
 	PR libstdc++/17005 partial fix.

gcc/config/mips/mips-protos.h

@@ -88,7 +88,10 @@ enum mips_symbol_type {
 };
 #define NUM_SYMBOL_TYPES (SYMBOL_64_LOW + 1)
 
+extern bool mips_symbolic_constant_p (rtx, enum mips_symbol_type *);
+extern bool mips_atomic_symbolic_constant_p (rtx);
 extern int mips_regno_mode_ok_for_base_p (int, enum machine_mode, int);
+extern bool mips_stack_address_p (rtx, enum machine_mode);
 extern int mips_address_insns (rtx, enum machine_mode);
 extern int mips_const_insns (rtx);
 extern int mips_fetch_insns (rtx);
@@ -173,6 +176,7 @@ extern void mips_declare_object (FILE *, const char *, const char *,
 extern void mips_declare_object_name (FILE *, const char *, tree);
 extern void mips_finish_declare_object (FILE *, tree, int, int);
 
+extern bool mips_small_data_pattern_p (rtx);
 extern rtx mips_rewrite_small_data (rtx);
 extern HOST_WIDE_INT compute_frame_size (HOST_WIDE_INT);
 extern HOST_WIDE_INT mips_initial_elimination_offset (int, int);

gcc/config/mips/mips.h

@@ -1653,6 +1653,13 @@ extern const struct mips_cpu_info *mips_tune_info;
 
 #define FP_REG_RTX_P(X) (GET_CODE (X) == REG && FP_REG_P (REGNO (X)))
 
+/* True if X is (const (unspec [(const_int 0)] UNSPEC_GP)).  This is used
+   to initialize the mips16 gp pseudo register.  */
+#define CONST_GP_P(X)				\
+  (GET_CODE (X) == CONST			\
+   && GET_CODE (XEXP (X, 0)) == UNSPEC		\
+   && XINT (XEXP (X, 0), 1) == UNSPEC_GP)
+
 /* Return coprocessor number from register number.  */
 
 #define COPNUM_AS_CHAR_FROM_REGNUM(REGNO) 				\
@@ -2693,67 +2700,6 @@ typedef struct mips_args {
    be updated with the correct length of the insn.  */
 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
   ((LENGTH) = mips_adjust_insn_length ((INSN), (LENGTH)))
-
-
-/* Optionally define this if you have added predicates to
-   `MACHINE.c'.  This macro is called within an initializer of an
-   array of structures.  The first field in the structure is the
-   name of a predicate and the second field is an array of rtl
-   codes.  For each predicate, list all rtl codes that can be in
-   expressions matched by the predicate.  The list should have a
-   trailing comma.  Here is an example of two entries in the list
-   for a typical RISC machine:
-
-   #define PREDICATE_CODES \
-     {"gen_reg_rtx_operand", {SUBREG, REG}},  \
-     {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}},
-
-   Defining this macro does not affect the generated code (however,
-   incorrect definitions that omit an rtl code that may be matched
-   by the predicate can cause the compiler to malfunction).
-   Instead, it allows the table built by `genrecog' to be more
-   compact and efficient, thus speeding up the compiler.  The most
-   important predicates to include in the list specified by this
-   macro are thoses used in the most insn patterns.  */
-
-#define PREDICATE_CODES							\
-  {"uns_arith_operand",		{ REG, CONST_INT, SUBREG }},		\
-  {"symbolic_operand",		{ CONST, SYMBOL_REF, LABEL_REF }},	\
-  {"general_symbolic_operand",	{ CONST, SYMBOL_REF, LABEL_REF }},	\
-  {"global_got_operand",	{ CONST, SYMBOL_REF, LABEL_REF }},	\
-  {"local_got_operand",		{ CONST, SYMBOL_REF, LABEL_REF }},	\
-  {"const_arith_operand",	{ CONST_INT }},				\
-  {"small_data_pattern",	{ SET, PARALLEL, UNSPEC,		\
-				  UNSPEC_VOLATILE }},			\
-  {"arith_operand",		{ REG, CONST_INT, CONST, SUBREG }},	\
-  {"reg_or_0_operand",		{ REG, CONST_INT, CONST_DOUBLE, SUBREG }}, \
-  {"sle_operand",		{ CONST_INT }},				\
-  {"sleu_operand",		{ CONST_INT }},				\
-  {"small_int",			{ CONST_INT }},				\
-  {"const_float_1_operand",	{ CONST_DOUBLE }},			\
-  {"reg_or_const_float_1_operand", { CONST_DOUBLE, REG}},               \
-  {"equality_op",		{ EQ, NE }},				\
-  {"cmp_op",			{ EQ, NE, GT, GE, GTU, GEU, LT, LE,	\
-				  LTU, LEU }},				\
-  {"trap_cmp_op",		{ EQ, NE, GE, GEU, LT, LTU }},		\
-  {"pc_or_label_operand",	{ PC, LABEL_REF }},			\
-  {"call_insn_operand",		{ CONST, SYMBOL_REF, LABEL_REF, REG }},	\
-  {"move_operand", 		{ CONST_INT, CONST_DOUBLE, CONST,	\
-				  SYMBOL_REF, LABEL_REF, SUBREG,	\
-				  REG, MEM}},				\
-  {"stack_operand",		{ MEM }},				\
-  {"consttable_operand",	{ LABEL_REF, SYMBOL_REF, CONST_INT,	\
-				  CONST_DOUBLE, CONST }},		\
-  {"fcc_register_operand",	{ REG, SUBREG }},			\
-  {"hilo_operand",		{ REG }},				\
-  {"macc_msac_operand",		{ PLUS, MINUS }},			\
-  {"extend_operator",		{ ZERO_EXTEND, SIGN_EXTEND }},
-
-/* A list of predicates that do special things with modes, and so
-   should not elicit warnings for VOIDmode match_operand.  */
-
-#define SPECIAL_MODE_PREDICATES \
-  "pc_or_label_operand",
 
 /* Control the assembler format that we output.  */
 

gcc/config/mips/predicates.md

+;; Predicate definitions for MIPS.
+;; Copyright (C) 2004 Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify
+;; it under the terms of the GNU General Public License as published by
+;; the Free Software Foundation; either version 2, or (at your option)
+;; any later version.
+;;
+;; GCC is distributed in the hope that it will be useful,
+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+;; GNU General Public License for more details.
+;;
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING.  If not, write to
+;; the Free Software Foundation, 59 Temple Place - Suite 330,
+;; Boston, MA 02111-1307, USA.
+
+(define_predicate "const_uns_arith_operand"
+  (and (match_code "const_int")
+       (match_test "SMALL_OPERAND_UNSIGNED (INTVAL (op))")))
+
+(define_predicate "uns_arith_operand"
+  (ior (match_operand 0 "const_uns_arith_operand")
+       (match_operand 0 "register_operand")))
+
+(define_predicate "const_arith_operand"
+  (and (match_code "const_int")
+       (match_test "SMALL_OPERAND (INTVAL (op))")))
+
+(define_predicate "arith_operand"
+  (ior (match_operand 0 "const_arith_operand")
+       (match_operand 0 "register_operand")))
+
+(define_predicate "sle_operand"
+  (and (match_code "const_int")
+       (match_test "SMALL_OPERAND (INTVAL (op) + 1)")))
+
+(define_predicate "sleu_operand"
+  (and (match_operand 0 "sle_operand")
+       (match_test "INTVAL (op) + 1 != 0")))
+
+(define_predicate "const_0_operand"
+  (and (match_code "const_int,const_double")
+       (match_test "op == CONST0_RTX (GET_MODE (op))")))
+
+(define_predicate "reg_or_0_operand"
+  (ior (and (match_operand 0 "const_0_operand")
+	    (match_test "!TARGET_MIPS16"))
+       (match_operand 0 "register_operand")))
+
+(define_predicate "const_1_operand"
+  (and (match_code "const_int,const_double")
+       (match_test "op == CONST1_RTX (GET_MODE (op))")))
+
+(define_predicate "reg_or_1_operand"
+  (ior (match_operand 0 "const_1_operand")
+       (match_operand 0 "register_operand")))
+
+(define_predicate "fpr_operand"
+  (and (match_code "reg")
+       (match_test "FP_REG_P (REGNO (op))")))
+
+(define_predicate "hilo_operand"
+  (and (match_code "reg")
+       (match_test "MD_REG_P (REGNO (op))")))
+
+(define_predicate "lo_operand"
+  (and (match_code "reg")
+       (match_test "REGNO (op) == LO_REGNUM")))
+
+(define_predicate "fcc_reload_operand"
+  (and (match_code "reg,subreg")
+       (match_test "ST_REG_P (true_regnum (op))")))
+
+(define_special_predicate "pc_or_label_operand"
+  (match_code "pc,label_ref"))
+
+(define_predicate "const_call_insn_operand"
+  (match_code "const,symbol_ref,label_ref")
+{
+  enum mips_symbol_type symbol_type;
+
+  if (!mips_symbolic_constant_p (op, &symbol_type))
+    return false;
+
+  switch (symbol_type)
+    {
+    case SYMBOL_GENERAL:
+      /* If -mlong-calls, force all calls to use register addressing.  */
+      return !TARGET_LONG_CALLS;
+
+    case SYMBOL_GOT_GLOBAL:
+      /* Without explicit relocs, there is no special syntax for
+	 loading the address of a call destination into a register.
+	 Using "la $25,foo; jal $25" would prevent the lazy binding
+	 of "foo", so keep the address of global symbols with the
+	 jal macro.  */
+      return !TARGET_EXPLICIT_RELOCS;
+
+    default:
+      return false;
+    }
+})
+
+(define_predicate "call_insn_operand"
+  (ior (match_operand 0 "const_call_insn_operand")
+       (match_operand 0 "register_operand")))
+
+(define_predicate "move_operand"
+  (match_operand 0 "general_operand")
+{
+  switch (GET_CODE (op))
+    {
+    case CONST_INT:
+      /* When generating mips16 code, LEGITIMATE_CONSTANT_P rejects
+	 CONST_INTs that can't be loaded using simple insns.  */
+      if (TARGET_MIPS16)
+	return true;
+
+      /* When generating 32-bit code, allow DImode move_operands to
+	 match arbitrary constants.  We split them after reload.  */
+      if (!TARGET_64BIT && mode == DImode)
+	return true;
+
+      /* Otherwise check whether the constant can be loaded in a single
+	 instruction.  */
+      return LUI_INT (op) || SMALL_INT (op) || SMALL_INT_UNSIGNED (op);
+
+    case CONST:
+    case SYMBOL_REF:
+    case LABEL_REF:
+      return CONST_GP_P (op) || mips_atomic_symbolic_constant_p (op);
+
+    default:
+      return true;
+    }
+})
+
+(define_predicate "consttable_operand"
+  (match_test "CONSTANT_P (op)"))
+
+(define_predicate "symbolic_operand"
+  (match_code "const,symbol_ref,label_ref")
+{
+  enum mips_symbol_type type;
+  return mips_symbolic_constant_p (op, &type);
+})
+
+(define_predicate "general_symbolic_operand"
+  (match_code "const,symbol_ref,label_ref")
+{
+  enum mips_symbol_type type;
+  return mips_symbolic_constant_p (op, &type) && type == SYMBOL_GENERAL;
+})
+
+(define_predicate "global_got_operand"
+  (match_code "const,symbol_ref,label_ref")
+{
+  enum mips_symbol_type type;
+  return mips_symbolic_constant_p (op, &type) && type == SYMBOL_GOT_GLOBAL;
+})
+
+(define_predicate "local_got_operand"
+  (match_code "const,symbol_ref,label_ref")
+{
+  enum mips_symbol_type type;
+  return mips_symbolic_constant_p (op, &type) && type == SYMBOL_GOT_LOCAL;
+})
+
+(define_predicate "stack_operand"
+  (and (match_code "mem")
+       (match_test "mips_stack_address_p (XEXP (op, 0), GET_MODE (op))")))
+
+(define_predicate "macc_msac_operand"
+  (ior (and (match_code "plus") (match_test "ISA_HAS_MACC"))
+       (and (match_code "minus") (match_test "ISA_HAS_MSAC")))
+{
+  rtx mult = XEXP (op, GET_CODE (op) == PLUS ? 0 : 1);
+  rtx accum = XEXP (op, GET_CODE (op) == PLUS ? 1 : 0);
+  return (GET_CODE (mult) == MULT
+	  && REG_P (XEXP (mult, 0))
+	  && REG_P (XEXP (mult, 1))
+	  && REG_P (accum));
+})
+
+
+(define_predicate "equality_operator"
+  (match_code "eq,ne"))
+
+(define_predicate "extend_operator"
+  (match_code "zero_extend,sign_extend"))
+
+(define_predicate "trap_comparison_operator"
+  (match_code "eq,ne,lt,ltu,ge,geu"))
+
+
+(define_predicate "small_data_pattern"
+  (and (match_code "set,parallel,unspec,unspec_volatile")
+       (match_test "mips_small_data_pattern_p (op)")))

gcc/config/mips/sb1.md

@@ -390,7 +390,7 @@
 (define_insn_reservation "ir_sb1_mtxfer" 5
   (and (eq_attr "cpu" "sb1")
        (and (eq_attr "type" "xfer")
-	    (match_operand 0 "fp_register_operand")))
+	    (match_operand 0 "fpr_operand")))
   "sb1_fp0")
 
 ;; mfc1 latency 1 cycle.  
@@ -398,7 +398,7 @@
 (define_insn_reservation "ir_sb1_mfxfer" 1
   (and (eq_attr "cpu" "sb1")
        (and (eq_attr "type" "xfer")
-	    (not (match_operand 0 "fp_register_operand"))))
+	    (not (match_operand 0 "fpr_operand"))))
   "sb1_fp0")
 
 ;; ??? Can deliver at most 1 result per every 6 cycles because of issue