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riscv-gcc-1
Commit 966b774d by David Daney Committed by David Daney
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mips.md (sync_compare_and_swap<mode>): Handle compare against constant zero. 

	* config/mips/mips.md (sync_compare_and_swap<mode>): Handle compare
	against constant zero.
	* config/mips/mips.h (MIPS_COMPARE_AND_SWAP):  Handle constant zero
	operand.

From-SVN: r128963
parent 53c66634
Showing with 9 additions and 2 deletions
gcc/ChangeLog
2007-10-02 David Daney <ddaney@avtrex.com>
* config/mips/mips.md (sync_compare_and_swap<mode>): Handle compare
against constant zero.
* config/mips/mips.h (MIPS_COMPARE_AND_SWAP): Handle constant zero
operand.
2007-09-02 Kenneth Zadeck <zadeck@naturalbridge.com>
* ra-conflict.c: New file.
gcc/config/mips/mips.h
......@@ -2959,7 +2959,7 @@ while (0)
#define MIPS_COMPARE_AND_SWAP(SUFFIX, OP) \
"%(%<%[%|sync\n" \
"1:\tll" SUFFIX "\t%0,%1\n" \
"\tbne\t%0,%2,2f\n" \
"\tbne\t%0,%z2,2f\n" \
"\t" OP "\t%@,%3\n" \
"\tsc" SUFFIX "\t%@,%1\n" \
"\tbeq\t%@,%.,1b\n" \
......
gcc/config/mips/mips.md
......@@ -4329,7 +4329,7 @@
[(set (match_operand:GPR 0 "register_operand" "=&d,&d")
(match_operand:GPR 1 "memory_operand" "+R,R"))
(set (match_dup 1)
(unspec_volatile:GPR [(match_operand:GPR 2 "register_operand" "d,d")
(unspec_volatile:GPR [(match_operand:GPR 2 "reg_or_0_operand" "dJ,dJ")
(match_operand:GPR 3 "arith_operand" "I,d")]
UNSPEC_COMPARE_AND_SWAP))]
"GENERATE_LL_SC"
......
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