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riscv-gcc-1
Commit 9615f239 by David Edelsohn Committed by David Edelsohn
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rs6000.c (print_operand): Calculate signed constant more clearly. 

        * rs6000.c (print_operand) [w]: Calculate signed constant more clearly.
        (rs6000_allocate_stack_space): Print as hexadecimal value.
        * rs6000.h (CONST_OK_FOR_LETTER_P): 'L' checks for a signed,
        16-bit shifted constant.  Fix typo for 'P'.
        (EXTRA_CONSTARINT): 'T' checks for a 32-bit mask operand.
        * rs6000.md (movsi, addsi3_internal1, movdi, adddi3_internal1):
        Use 'L' for shifted constant.
        (anddi3_internal3): Fix typo.
        (32-bit mask patterns): Use 'T'.

Co-Authored-By: Richard Henderson <rth@cygnus.com>

From-SVN: r26904
parent 7f8e55a0
Showing with 44 additions and 29 deletions
gcc/ChangeLog
Wed May 12 18:08:48 1999 David Edelsohn <edelsohn@gnu.org>
Richard Henderson <rth@cygnus.com>
* rs6000.c (print_operand) [w]: Calculate signed constant more clearly.
(rs6000_allocate_stack_space): Print as hexadecimal value.
* rs6000.h (CONST_OK_FOR_LETTER_P): 'L' checks for a signed,
16-bit shifted constant. Fix typo for 'P'.
(EXTRA_CONSTARINT): 'T' checks for a 32-bit mask operand.
* rs6000.md (movsi, addsi3_internal1, movdi, adddi3_internal1):
Use 'L' for shifted constant.
(anddi3_internal3): Fix typo.
(32-bit mask patterns): Use 'T'.
Wed May 12 07:30:31 1999 Bruce Korb <ddsinc09@ix.netcom.com> Wed May 12 07:30:31 1999 Bruce Korb <ddsinc09@ix.netcom.com>
* fixinc/fixincl.c(quoted_file_exists): new procedure to ensure that * fixinc/fixincl.c(quoted_file_exists): new procedure to ensure that
......
gcc/config/rs6000/rs6000.c
...@@ -3063,7 +3063,7 @@ print_operand (file, x, code) ...@@ -3063,7 +3063,7 @@ print_operand (file, x, code)
{ {
int value = (INT_LOWPART (x) >> 16) & 0xffff; int value = (INT_LOWPART (x) >> 16) & 0xffff;
/* Solaris assembler doesn't like lis 0,0x80000 */ /* Solaris assembler doesn't like lis 0,0x8000 */
if (DEFAULT_ABI == ABI_SOLARIS && (value & 0x8000) != 0) if (DEFAULT_ABI == ABI_SOLARIS && (value & 0x8000) != 0)
fprintf (file, "%d", value | (~0 << 16)); fprintf (file, "%d", value | (~0 << 16));
else else
...@@ -3122,8 +3122,7 @@ print_operand (file, x, code) ...@@ -3122,8 +3122,7 @@ print_operand (file, x, code)
/* If constant, low-order 16 bits of constant, signed. Otherwise, write /* If constant, low-order 16 bits of constant, signed. Otherwise, write
normally. */ normally. */
if (INT_P (x)) if (INT_P (x))
fprintf (file, "%d", fprintf (file, "%d", ((INT_LOWPART (x) & 0xffff) ^ 0x8000) - 0x8000);
(INT_LOWPART (x) & 0xffff) - 2 * (INT_LOWPART (x) & 0x8000));
else else
print_operand (file, x, 0); print_operand (file, x, 0);
return; return;
...@@ -3915,7 +3914,7 @@ rs6000_output_load_toc_table (file, reg) ...@@ -3915,7 +3914,7 @@ rs6000_output_load_toc_table (file, reg)
reg_names[reg], reg_names[0], reg_names[reg]); reg_names[reg], reg_names[0], reg_names[reg]);
rs6000_pic_labelno++; rs6000_pic_labelno++;
} }
else if (!TARGET_64BIT) else if (! TARGET_64BIT)
{ {
ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1);
asm_fprintf (file, "\t{liu|lis} %s,", reg_names[reg]); asm_fprintf (file, "\t{liu|lis} %s,", reg_names[reg]);
...@@ -3959,7 +3958,7 @@ rs6000_allocate_stack_space (file, size, copy_r12) ...@@ -3959,7 +3958,7 @@ rs6000_allocate_stack_space (file, size, copy_r12)
if (copy_r12) if (copy_r12)
fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]);
asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n",
reg_names[0], (neg_size >> 16) & 0xffff, reg_names[0], (neg_size >> 16) & 0xffff,
reg_names[0], reg_names[0], neg_size & 0xffff); reg_names[0], reg_names[0], neg_size & 0xffff);
asm_fprintf (file, asm_fprintf (file,
...@@ -3975,7 +3974,7 @@ rs6000_allocate_stack_space (file, size, copy_r12) ...@@ -3975,7 +3974,7 @@ rs6000_allocate_stack_space (file, size, copy_r12)
reg_names[1], neg_size, reg_names[1]); reg_names[1], neg_size, reg_names[1]);
else else
{ {
asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n",
reg_names[0], (neg_size >> 16) & 0xffff, reg_names[0], (neg_size >> 16) & 0xffff,
reg_names[0], reg_names[0], neg_size & 0xffff); reg_names[0], reg_names[0], neg_size & 0xffff);
asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", reg_names[1], asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", reg_names[1],
...@@ -4211,7 +4210,7 @@ output_prolog (file, size) ...@@ -4211,7 +4210,7 @@ output_prolog (file, size)
{ {
int neg_size = info->main_save_offset - info->total_size; int neg_size = info->main_save_offset - info->total_size;
loc = 0; loc = 0;
asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n", asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n",
reg_names[0], (neg_size >> 16) & 0xffff, reg_names[0], (neg_size >> 16) & 0xffff,
reg_names[0], reg_names[0], neg_size & 0xffff); reg_names[0], reg_names[0], neg_size & 0xffff);
......
gcc/config/rs6000/rs6000.h
...@@ -1087,10 +1087,10 @@ enum reg_class ...@@ -1087,10 +1087,10 @@ enum reg_class
C is the letter, and VALUE is a constant value. C is the letter, and VALUE is a constant value.
Return 1 if VALUE is in the range specified by C. Return 1 if VALUE is in the range specified by C.
`I' is signed 16-bit constants `I' is a signed 16-bit constant
`J' is a constant with only the high-order 16 bits non-zero `J' is a constant with only the high-order 16 bits non-zero
`K' is a constant with only the low-order 16 bits non-zero `K' is a constant with only the low-order 16 bits non-zero
`L' is a constant that can be placed into a mask operand `L' is a signed 16-bit constant shifted left 16 bits
`M' is a constant that is greater than 31 `M' is a constant that is greater than 31
`N' is a constant that is an exact power of two `N' is a constant that is an exact power of two
`O' is the constant zero `O' is the constant zero
...@@ -1100,11 +1100,12 @@ enum reg_class ...@@ -1100,11 +1100,12 @@ enum reg_class
( (C) == 'I' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \ ( (C) == 'I' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \
: (C) == 'J' ? ((VALUE) & (~ (HOST_WIDE_INT) 0xffff0000)) == 0 \ : (C) == 'J' ? ((VALUE) & (~ (HOST_WIDE_INT) 0xffff0000)) == 0 \
: (C) == 'K' ? ((VALUE) & (~ (HOST_WIDE_INT) 0xffff)) == 0 \ : (C) == 'K' ? ((VALUE) & (~ (HOST_WIDE_INT) 0xffff)) == 0 \
: (C) == 'L' ? mask_constant (VALUE) \ : (C) == 'L' ? (((VALUE) & 0xffff) == 0 \
&& ((VALUE) >> 31 == -1 || (VALUE) >> 31 == 0)) \
: (C) == 'M' ? (VALUE) > 31 \ : (C) == 'M' ? (VALUE) > 31 \
: (C) == 'N' ? exact_log2 (VALUE) >= 0 \ : (C) == 'N' ? exact_log2 (VALUE) >= 0 \
: (C) == 'O' ? (VALUE) == 0 \ : (C) == 'O' ? (VALUE) == 0 \
: (C) == 'P' ? (unsigned HOST_WIDE_INT) ((- (VALUE)) + 0x8000) < 0x1000 \ : (C) == 'P' ? (unsigned HOST_WIDE_INT) ((- (VALUE)) + 0x8000) < 0x10000 \
: 0) : 0)
/* Similar, but for floating constants, and defining letters G and H. /* Similar, but for floating constants, and defining letters G and H.
...@@ -1126,12 +1127,14 @@ enum reg_class ...@@ -1126,12 +1127,14 @@ enum reg_class
'Q' means that is a memory operand that is just an offset from a reg. 'Q' means that is a memory operand that is just an offset from a reg.
'R' is for AIX TOC entries. 'R' is for AIX TOC entries.
'S' is a constant that can be placed into a 64-bit mask operand 'S' is a constant that can be placed into a 64-bit mask operand
'T' is a consatnt that can be placed into a 32-bit mask operand
'U' is for V.4 small data references. */ 'U' is for V.4 small data references. */
#define EXTRA_CONSTRAINT(OP, C) \ #define EXTRA_CONSTRAINT(OP, C) \
((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \ ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \
: (C) == 'R' ? LEGITIMATE_CONSTANT_POOL_ADDRESS_P (OP) \ : (C) == 'R' ? LEGITIMATE_CONSTANT_POOL_ADDRESS_P (OP) \
: (C) == 'S' ? mask64_operand (OP, VOIDmode) \ : (C) == 'S' ? mask64_operand (OP, VOIDmode) \
: (C) == 'T' ? mask_operand (OP, VOIDmode) \
: (C) == 'U' ? ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) \ : (C) == 'U' ? ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) \
&& small_data_operand (OP, GET_MODE (OP))) \ && small_data_operand (OP, GET_MODE (OP))) \
: 0) : 0)
......
gcc/config/rs6000/rs6000.md
...@@ -916,7 +916,7 @@ ...@@ -916,7 +916,7 @@
(define_insn "*addsi3_internal1" (define_insn "*addsi3_internal1"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,?r,r") [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,?r,r")
(plus:SI (match_operand:SI 1 "gpc_reg_operand" "%r,b,r,b") (plus:SI (match_operand:SI 1 "gpc_reg_operand" "%r,b,r,b")
(match_operand:SI 2 "add_operand" "r,I,I,J")))] (match_operand:SI 2 "add_operand" "r,I,I,L")))]
"" ""
"@ "@
{cax|add} %0,%1,%2 {cax|add} %0,%1,%2
...@@ -1853,7 +1853,7 @@ ...@@ -1853,7 +1853,7 @@
(define_insn "andsi3" (define_insn "andsi3"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r") [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r")
(and:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r") (and:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r")
(match_operand:SI 2 "and_operand" "?r,L,K,J"))) (match_operand:SI 2 "and_operand" "?r,T,K,J")))
(clobber (match_scratch:CC 3 "=X,X,x,x"))] (clobber (match_scratch:CC 3 "=X,X,x,x"))]
"" ""
"@ "@
...@@ -1870,7 +1870,7 @@ ...@@ -1870,7 +1870,7 @@
(define_insn "*andsi3_internal2" (define_insn "*andsi3_internal2"
[(set (match_operand:CC 0 "cc_reg_operand" "=x,x,x,x,?y,??y,??y,?y") [(set (match_operand:CC 0 "cc_reg_operand" "=x,x,x,x,?y,??y,??y,?y")
(compare:CC (and:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r,r,r,r") (compare:CC (and:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r,r,r,r")
(match_operand:SI 2 "and_operand" "r,K,J,L,r,K,J,L")) (match_operand:SI 2 "and_operand" "r,K,J,T,r,K,J,T"))
(const_int 0))) (const_int 0)))
(clobber (match_scratch:SI 3 "=r,r,r,r,r,r,r,r")) (clobber (match_scratch:SI 3 "=r,r,r,r,r,r,r,r"))
(clobber (match_scratch:CC 4 "=X,X,X,X,X,x,x,X"))] (clobber (match_scratch:CC 4 "=X,X,X,X,X,x,x,X"))]
...@@ -1907,7 +1907,7 @@ ...@@ -1907,7 +1907,7 @@
(define_insn "*andsi3_internal3" (define_insn "*andsi3_internal3"
[(set (match_operand:CC 3 "cc_reg_operand" "=x,x,x,x,?y,??y,??y,?y") [(set (match_operand:CC 3 "cc_reg_operand" "=x,x,x,x,?y,??y,??y,?y")
(compare:CC (and:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r,r,r,r") (compare:CC (and:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r,r,r,r")
(match_operand:SI 2 "and_operand" "r,K,J,L,r,K,J,L")) (match_operand:SI 2 "and_operand" "r,K,J,T,r,K,J,T"))
(const_int 0))) (const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r,r,r,r,r") (set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r,r,r,r,r")
(and:SI (match_dup 1) (and:SI (match_dup 1)
...@@ -2908,7 +2908,7 @@ ...@@ -2908,7 +2908,7 @@
[(set (match_operand:SI 0 "gpc_reg_operand" "=r") [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(and:SI (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r") (and:SI (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "reg_or_cint_operand" "ri")) (match_operand:SI 2 "reg_or_cint_operand" "ri"))
(match_operand:SI 3 "mask_operand" "L")))] (match_operand:SI 3 "mask_operand" "T")))]
"" ""
"{rl%I2nm|rlw%I2nm} %0,%1,%h2,%m3,%M3") "{rl%I2nm|rlw%I2nm} %0,%1,%h2,%m3,%M3")
...@@ -2917,7 +2917,7 @@ ...@@ -2917,7 +2917,7 @@
(compare:CC (and:SI (compare:CC (and:SI
(rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r") (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "reg_or_cint_operand" "ri")) (match_operand:SI 2 "reg_or_cint_operand" "ri"))
(match_operand:SI 3 "mask_operand" "L")) (match_operand:SI 3 "mask_operand" "T"))
(const_int 0))) (const_int 0)))
(clobber (match_scratch:SI 4 "=r"))] (clobber (match_scratch:SI 4 "=r"))]
"" ""
...@@ -2929,7 +2929,7 @@ ...@@ -2929,7 +2929,7 @@
(compare:CC (and:SI (compare:CC (and:SI
(rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r") (rotate:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "reg_or_cint_operand" "ri")) (match_operand:SI 2 "reg_or_cint_operand" "ri"))
(match_operand:SI 3 "mask_operand" "L")) (match_operand:SI 3 "mask_operand" "T"))
(const_int 0))) (const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (set (match_operand:SI 0 "gpc_reg_operand" "=r")
(and:SI (rotate:SI (match_dup 1) (match_dup 2)) (match_dup 3)))] (and:SI (rotate:SI (match_dup 1) (match_dup 2)) (match_dup 3)))]
...@@ -3093,7 +3093,7 @@ ...@@ -3093,7 +3093,7 @@
[(set (match_operand:SI 0 "gpc_reg_operand" "=r") [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(and:SI (ashift:SI (match_operand:SI 1 "gpc_reg_operand" "r") (and:SI (ashift:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "const_int_operand" "i")) (match_operand:SI 2 "const_int_operand" "i"))
(match_operand:SI 3 "mask_operand" "L")))] (match_operand:SI 3 "mask_operand" "T")))]
"includes_lshift_p (operands[2], operands[3])" "includes_lshift_p (operands[2], operands[3])"
"{rlinm|rlwinm} %0,%1,%h2,%m3,%M3") "{rlinm|rlwinm} %0,%1,%h2,%m3,%M3")
...@@ -3102,7 +3102,7 @@ ...@@ -3102,7 +3102,7 @@
(compare:CC (compare:CC
(and:SI (ashift:SI (match_operand:SI 1 "gpc_reg_operand" "r") (and:SI (ashift:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "const_int_operand" "i")) (match_operand:SI 2 "const_int_operand" "i"))
(match_operand:SI 3 "mask_operand" "L")) (match_operand:SI 3 "mask_operand" "T"))
(const_int 0))) (const_int 0)))
(clobber (match_scratch:SI 4 "=r"))] (clobber (match_scratch:SI 4 "=r"))]
"includes_lshift_p (operands[2], operands[3])" "includes_lshift_p (operands[2], operands[3])"
...@@ -3114,7 +3114,7 @@ ...@@ -3114,7 +3114,7 @@
(compare:CC (compare:CC
(and:SI (ashift:SI (match_operand:SI 1 "gpc_reg_operand" "r") (and:SI (ashift:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "const_int_operand" "i")) (match_operand:SI 2 "const_int_operand" "i"))
(match_operand:SI 3 "mask_operand" "L")) (match_operand:SI 3 "mask_operand" "T"))
(const_int 0))) (const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (set (match_operand:SI 0 "gpc_reg_operand" "=r")
(and:SI (ashift:SI (match_dup 1) (match_dup 2)) (match_dup 3)))] (and:SI (ashift:SI (match_dup 1) (match_dup 2)) (match_dup 3)))]
...@@ -3216,7 +3216,7 @@ ...@@ -3216,7 +3216,7 @@
[(set (match_operand:SI 0 "gpc_reg_operand" "=r") [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(and:SI (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r") (and:SI (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "const_int_operand" "i")) (match_operand:SI 2 "const_int_operand" "i"))
(match_operand:SI 3 "mask_operand" "L")))] (match_operand:SI 3 "mask_operand" "T")))]
"includes_rshift_p (operands[2], operands[3])" "includes_rshift_p (operands[2], operands[3])"
"{rlinm|rlwinm} %0,%1,%s2,%m3,%M3") "{rlinm|rlwinm} %0,%1,%s2,%m3,%M3")
...@@ -3225,7 +3225,7 @@ ...@@ -3225,7 +3225,7 @@
(compare:CC (compare:CC
(and:SI (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r") (and:SI (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "const_int_operand" "i")) (match_operand:SI 2 "const_int_operand" "i"))
(match_operand:SI 3 "mask_operand" "L")) (match_operand:SI 3 "mask_operand" "T"))
(const_int 0))) (const_int 0)))
(clobber (match_scratch:SI 4 "=r"))] (clobber (match_scratch:SI 4 "=r"))]
"includes_rshift_p (operands[2], operands[3])" "includes_rshift_p (operands[2], operands[3])"
...@@ -3237,7 +3237,7 @@ ...@@ -3237,7 +3237,7 @@
(compare:CC (compare:CC
(and:SI (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r") (and:SI (lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "const_int_operand" "i")) (match_operand:SI 2 "const_int_operand" "i"))
(match_operand:SI 3 "mask_operand" "L")) (match_operand:SI 3 "mask_operand" "T"))
(const_int 0))) (const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "=r") (set (match_operand:SI 0 "gpc_reg_operand" "=r")
(and:SI (lshiftrt:SI (match_dup 1) (match_dup 2)) (match_dup 3)))] (and:SI (lshiftrt:SI (match_dup 1) (match_dup 2)) (match_dup 3)))]
...@@ -4819,7 +4819,7 @@ ...@@ -4819,7 +4819,7 @@
(define_insn "*adddi3_internal1" (define_insn "*adddi3_internal1"
[(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,?r,r") [(set (match_operand:DI 0 "gpc_reg_operand" "=r,r,?r,r")
(plus:DI (match_operand:DI 1 "gpc_reg_operand" "%r,b,r,b") (plus:DI (match_operand:DI 1 "gpc_reg_operand" "%r,b,r,b")
(match_operand:DI 2 "add_operand" "r,I,I,J")))] (match_operand:DI 2 "add_operand" "r,I,I,L")))]
"TARGET_POWERPC64" "TARGET_POWERPC64"
"@ "@
add %0,%1,%2 add %0,%1,%2
...@@ -5475,7 +5475,7 @@ ...@@ -5475,7 +5475,7 @@
and. %0,%1,%2 and. %0,%1,%2
andi. %0,%1,%b2 andi. %0,%1,%b2
andis. %0,%1,%u2 andis. %0,%1,%u2
rldic%B2. %3,%1,0,%S2" rldic%B2. %0,%1,0,%S2"
[(set_attr "type" "compare,compare,compare,delayed_compare")]) [(set_attr "type" "compare,compare,compare,delayed_compare")])
(define_expand "iordi3" (define_expand "iordi3"
...@@ -5975,7 +5975,7 @@ ...@@ -5975,7 +5975,7 @@
(define_insn "" (define_insn ""
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,m,r,r,r,r,r,*q,*c*l,*h") [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,m,r,r,r,r,r,*q,*c*l,*h")
(match_operand:SI 1 "input_operand" "r,U,m,r,I,J,n,R,*h,r,r,0"))] (match_operand:SI 1 "input_operand" "r,U,m,r,I,L,n,R,*h,r,r,0"))]
"gpc_reg_operand (operands[0], SImode) "gpc_reg_operand (operands[0], SImode)
|| gpc_reg_operand (operands[1], SImode)" || gpc_reg_operand (operands[1], SImode)"
"@ "@
...@@ -6214,7 +6214,7 @@ ...@@ -6214,7 +6214,7 @@
(define_insn "*movsf_softfloat" (define_insn "*movsf_softfloat"
[(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,m,r,r,r,r,r") [(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,m,r,r,r,r,r")
(match_operand:SF 1 "input_operand" "r,m,r,I,J,R,G,Fn"))] (match_operand:SF 1 "input_operand" "r,m,r,I,L,R,G,Fn"))]
"(gpc_reg_operand (operands[0], SFmode) "(gpc_reg_operand (operands[0], SFmode)
|| gpc_reg_operand (operands[1], SFmode)) && TARGET_SOFT_FLOAT" || gpc_reg_operand (operands[1], SFmode)) && TARGET_SOFT_FLOAT"
"@ "@
...@@ -6601,7 +6601,7 @@ ...@@ -6601,7 +6601,7 @@
(define_insn "*movdi_64" (define_insn "*movdi_64"
[(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,m,r,r,r,r,f,f,m,r,*h,*h") [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,m,r,r,r,r,f,f,m,r,*h,*h")
(match_operand:DI 1 "input_operand" "r,m,r,I,J,nF,R,f,m,f,*h,r,0"))] (match_operand:DI 1 "input_operand" "r,m,r,I,L,nF,R,f,m,f,*h,r,0"))]
"TARGET_POWERPC64 "TARGET_POWERPC64
&& (gpc_reg_operand (operands[0], DImode) && (gpc_reg_operand (operands[0], DImode)
|| gpc_reg_operand (operands[1], DImode))" || gpc_reg_operand (operands[1], DImode))"
......
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