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riscv-gcc-1
Commit 94dcded2 by David Edelsohn Committed by David Edelsohn
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re PR target/20276 (64bit PPC target uses __adddi3) 

	PR target/20276
	* config/rs6000/predicates.md (reg_or_cint64_operand): Fix typo.
	(reg_or_sub_cint64_operand): Same.

From-SVN: r95789
parent 68023570
Showing with 8 additions and 2 deletions
gcc/ChangeLog
2005-03-02 David Edelsohn <edelsohn@gnu.org>
PR target/20276
* config/rs6000/predicates.md (reg_or_cint64_operand): Fix typo.
(reg_or_sub_cint64_operand): Same.
2005-03-02 Jeff Law <law@redhat.com>
* tree-ssa-dom.c (tree_ssa_dominator_optimize): Fix setting of
......
gcc/config/rs6000/predicates.md
......@@ -148,7 +148,7 @@
(define_predicate "reg_or_add_cint64_operand"
(if_then_else (match_code "const_int")
(match_test "(HOST_BITS_PER_WIDE_INT == 32 && INTVAL (op) < 0x7fff8000)
|| ((unsigned HOST_WIDE_INT) (INTVAL (op) + 0x80000000)
|| ((unsigned HOST_WIDE_INT) (INTVAL (op) + 0x80008000)
< (unsigned HOST_WIDE_INT) 0x100000000ll)")
(match_operand 0 "gpc_reg_operand")))
......@@ -157,7 +157,7 @@
(define_predicate "reg_or_sub_cint64_operand"
(if_then_else (match_code "const_int")
(match_test "(HOST_BITS_PER_WIDE_INT == 32 && INTVAL (op) < 0x7fff8000)
|| ((unsigned HOST_WIDE_INT) ((- INTVAL (op)) + 0x80000000)
|| ((unsigned HOST_WIDE_INT) ((- INTVAL (op)) + 0x80008000)
< (unsigned HOST_WIDE_INT) 0x100000000ll)")
(match_operand 0 "gpc_reg_operand")))
......
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