arc.md (*storeqi_update): Use 'memory_operand' and fix RTL pattern to include the plus.

2015-12-19  Andrew Burgess  <andrew.burgess@embecosm.com>

        * config/arc/arc.md (*storeqi_update): Use 'memory_operand' and
        fix RTL pattern to include the plus.
        (*storehi_update): Likewise.
        (*storesi_update): Likewise.
        (*storesf_update): Likewise.
        * config/arc/predicates.md (store_update_operand): Delete.

From-SVN: r231850

gcc/ChangeLog

 2015-12-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 
+	* config/arc/arc.md (*storeqi_update): Use 'any_mem_operand' and
+	fix RTL pattern to include the plus.
+	(*storehi_update): Likewise.
+	(*storesi_update): Likewise.
+	(*storesf_update): Likewise.
+	* config/arc/predicates.md (store_update_operand): Delete.
+
+2015-12-19  Andrew Burgess  <andrew.burgess@embecosm.com>
+
 	* config/arc/arc.md (*loadqi_update): Use new 'any_mem_operand'
 	and fix RTL pattern to include the plus.
 	(*load_zeroextendqisi_update): Likewise.

gcc/config/arc/arc.md

@@ -1149,9 +1149,9 @@
    (set_attr "length" "4,8")])
 
 (define_insn "*storeqi_update"
-  [(set (match_operator:QI 4 "store_update_operand"
-	 [(match_operand:SI 1 "register_operand" "0")
-	  (match_operand:SI 2 "short_immediate_operand" "I")])
+  [(set (match_operator:QI 4 "any_mem_operand"
+	 [(plus:SI (match_operand:SI 1 "register_operand" "0")
+	           (match_operand:SI 2 "short_immediate_operand" "I"))])
 	(match_operand:QI 3 "register_operand" "c"))
    (set (match_operand:SI 0 "dest_reg_operand" "=w")
 	(plus:SI (match_dup 1) (match_dup 2)))]
@@ -1200,9 +1200,9 @@
    (set_attr "length" "4,8")])
 
 (define_insn "*storehi_update"
-  [(set (match_operator:HI 4 "store_update_operand"
-	 [(match_operand:SI 1 "register_operand" "0")
-	  (match_operand:SI 2 "short_immediate_operand" "I")])
+  [(set (match_operator:HI 4 "any_mem_operand"
+	 [(plus:SI (match_operand:SI 1 "register_operand" "0")
+	           (match_operand:SI 2 "short_immediate_operand" "I"))])
 	(match_operand:HI 3 "register_operand" "c"))
    (set (match_operand:SI 0 "dest_reg_operand" "=w")
 	(plus:SI (match_dup 1) (match_dup 2)))]
@@ -1225,9 +1225,9 @@
    (set_attr "length" "4,8")])
 
 (define_insn "*storesi_update"
-  [(set (match_operator:SI 4 "store_update_operand"
-	 [(match_operand:SI 1 "register_operand" "0")
-	  (match_operand:SI 2 "short_immediate_operand" "I")])
+  [(set (match_operator:SI 4 "any_mem_operand"
+	 [(plus:SI (match_operand:SI 1 "register_operand" "0")
+	           (match_operand:SI 2 "short_immediate_operand" "I"))])
 	(match_operand:SI 3 "register_operand" "c"))
    (set (match_operand:SI 0 "dest_reg_operand" "=w")
 	(plus:SI (match_dup 1) (match_dup 2)))]
@@ -1249,9 +1249,9 @@
    (set_attr "length" "4,8")])
 
 (define_insn "*storesf_update"
-  [(set (match_operator:SF 4 "store_update_operand"
-	 [(match_operand:SI 1 "register_operand" "0")
-	  (match_operand:SI 2 "short_immediate_operand" "I")])
+  [(set (match_operator:SF 4 "any_mem_operand"
+	 [(plus:SI (match_operand:SI 1 "register_operand" "0")
+	           (match_operand:SI 2 "short_immediate_operand" "I"))])
 	(match_operand:SF 3 "register_operand" "c"))
    (set (match_operand:SI 0 "dest_reg_operand" "=w")
 	(plus:SI (match_dup 1) (match_dup 2)))]

gcc/config/arc/predicates.md

@@ -460,24 +460,6 @@
 }
 )
 
-;; Return true if OP is valid store with update operand.
-(define_predicate "store_update_operand"
-  (match_code "mem")
-{
-  if (GET_CODE (op) != MEM
-      || GET_MODE (op) != mode)
-    return 0;
-  op = XEXP (op, 0);
-  if (GET_CODE (op) != PLUS
-      || GET_MODE (op) != Pmode
-      || !register_operand (XEXP (op, 0), Pmode)
-      || !(GET_CODE (XEXP (op, 1)) == CONST_INT
-	   && SMALL_INT (INTVAL (XEXP (op, 1)))))
-    return 0;
-  return 1;
-}
-)
-
 ;; Return true if OP is a non-volatile non-immediate operand.
 ;; Volatile memory refs require a special "cache-bypass" instruction
 ;; and only the standard movXX patterns are set up to handle them.