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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
94b2a23b
Commit
94b2a23b
authored
Jun 17, 2003
by
Rainer Orth
Committed by
Rainer Orth
Jun 17, 2003
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* config/mips/mips.md (trap): Use break 0 when !TARGET_GAS.
From-SVN: r68112
parent
1f11df32
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gcc/ChangeLog
View file @
94b2a23b
2003-06-17 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
* config/mips/mips.md (trap): Use break 0 when !TARGET_GAS.
* config/mips/iris6-o32.h (MIPS_ISA_DEFAULT): Remove.
(MIPS_CPU_STRING_DEFAULT): Redefine to mips2.
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gcc/config/mips/mips.md
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94b2a23b
...
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@@ -640,7 +640,8 @@
{
if (ISA_HAS_COND_TRAP)
return \"teq\\t$0,$0\";
else if (TARGET_MIPS16)
/* The IRIX 6 O32 assembler requires the first break operand. */
else if (TARGET_MIPS16 || ! TARGET_GAS)
return \"break 0\";
else
return \"break\";
...
...
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