arm.c (typedef minipool_node): Renamed from pool_node.

* arm.c (typedef minipool_node): Renamed from pool_node.
(minipool_vector, minipool_size, minipool_vector_label): Similarly.
(add_minipool_constant): New function.
(dump_minipool): New function.
(find_barrier): Remove special case for getting the insn size of
an insn that references the constant pool.
(minipool_fixup): New structure.
(push_minipool_barrier): New function.
(push_minipool_fix): New function.
(note_invalid_constants): New function.
(add_pool_constant, dump_table, fixit, broken_move): Delete.
(arm_reorg): Rewrite code to fix up the constant pool into a
series of mini-pools embedded in the insn stream.
(arm_output_epilogue): New function, made mainly from the body
of output_func_epilogue.
(output_func_epilogue): Move insn generation part of epilogue code
to arm_output_epilogue.
* arm.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY): Delete.
* arm.md (pool_range): New attribute.
(zero_extendqidi2): Add attribute pool_range.
(zero_extend_hisi_insn, load_extendqisi, extendhisi_insn,
extendqihi_insn, extendqisi_insn, movdi, movsi_insn, pic_load_addr,
pic_load_addr_based_insn, movhi_insn_arch4, movhi_insn_littleend,
movhi_insn_bigend, loadhi_si_bigend, movsf_hard_insn, movsf_soft_insn,
movdf_hard_insn, movdf_soft_insn, movxf_hard_insn): Likewise.
(epilogue): New expand.
(epilogue_insn): New insn.  Call arm_output_epilogue.

* arm.c (arm_poke_function_name): Undo change of July 17.  Tidy up.
* arm.h (TARGET_SWITCHES): Add missing doc string for TARGET_DEFAULT.

From-SVN: r28499

gcc/ChangeLog

@@ -3,6 +3,37 @@ Wed Aug  4 09:06:14 1999  Richard Earnshaw (rearnsha@arm.com)
 	* recog.c (preproces_constraints): Zero recog_op_alt before 
 	processing the constraints.
 
+	* arm.c (typedef minipool_node): Renamed from pool_node.
+	(minipool_vector, minipool_size, minipool_vector_label): Similarly.
+	(add_minipool_constant): New function.
+	(dump_minipool): New function.
+	(find_barrier): Remove special case for getting the insn size of
+	an insn that references the constant pool.
+	(minipool_fixup): New structure.
+	(push_minipool_barrier): New function.
+	(push_minipool_fix): New function.
+	(note_invalid_constants): New function.
+	(add_pool_constant, dump_table, fixit, broken_move): Delete.
+	(arm_reorg): Rewrite code to fix up the constant pool into a
+	series of mini-pools embedded in the insn stream.
+	(arm_output_epilogue): New function, made mainly from the body
+	of output_func_epilogue.
+	(output_func_epilogue): Move insn generation part of epilogue code
+	to arm_output_epilogue.
+	* arm.h (ASM_OUTPUT_SPECIAL_POOL_ENTRY): Delete.
+	* arm.md (pool_range): New attribute.
+	(zero_extendqidi2): Add attribute pool_range.
+	(zero_extend_hisi_insn, load_extendqisi, extendhisi_insn,
+	extendqihi_insn, extendqisi_insn, movdi, movsi_insn, pic_load_addr,
+	pic_load_addr_based_insn, movhi_insn_arch4, movhi_insn_littleend,
+	movhi_insn_bigend, loadhi_si_bigend, movsf_hard_insn, movsf_soft_insn,
+	movdf_hard_insn, movdf_soft_insn, movxf_hard_insn): Likewise.
+	(epilogue): New expand.
+	(epilogue_insn): New insn.  Call arm_output_epilogue.
+
+	* arm.c (arm_poke_function_name): Undo change of July 17.  Tidy up.
+	* arm.h (TARGET_SWITCHES): Add missing doc string for TARGET_DEFAULT.
+
 Mon Aug  2 19:18:44 1999  Jason Merrill  <jason@yorick.cygnus.com>
 
 	* linux.h (HANDLE_PRAGMA_PACK_PUSH_POP): Define.

gcc/config/arm/arm.h

 /* Definitions of target machine for GNU compiler, for ARM.
-   Copyright (C) 1991, 93, 94, 95, 96, 97, 98, 1999 Free Software Foundation, Inc.
+   Copyright (C) 1991, 93-98, 1999 Free Software Foundation, Inc.
    Contributed by Pieter `Tiggr' Schoenmakers (rcpieter@win.tue.nl)
    and Martin Simmons (@harleqn.co.uk).
-   More major hacks by Richard Earnshaw (rwe11@cl.cam.ac.uk)
+   More major hacks by Richard Earnshaw (rearnsha@arm.com)
    Minor hacks by Nick Clifton (nickc@cygnus.com)
 
 This file is part of GNU CC.
@@ -394,7 +394,7 @@ Unrecognized value in TARGET_CPU_DEFAULT.
      "Do not load the PIC register in function prologues" },	\
   {"no-single-pic-base",       -ARM_FLAG_SINGLE_PIC_BASE, "" },	\
   SUBTARGET_SWITCHES						\
-  {"",				TARGET_DEFAULT }		\
+  {"",				TARGET_DEFAULT, "" }		\
 }
 
 #define TARGET_OPTIONS						\
@@ -1961,10 +1961,6 @@ extern struct rtx_def * arm_compare_op1;
    point in the code.  */
 #define MACHINE_DEPENDENT_REORG(INSN)	arm_reorg ((INSN))
 
-/* The pool is empty, since we have moved everything into the code.  */
-#define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE,X,MODE,ALIGN,LABELNO,JUMPTO)	\
-  goto JUMPTO
-
 /* Output an internal label definition.  */
 #ifndef ASM_OUTPUT_INTERNAL_LABEL
 #define ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM)		\
@@ -2304,6 +2300,7 @@ void   arm_poke_function_name STDIO_PROTO ((FILE *, char *));
 void   output_func_prologue STDIO_PROTO ((FILE *, int));
 void   output_func_epilogue STDIO_PROTO ((FILE *, int));
 void   arm_expand_prologue PROTO ((void));
+char * arm_output_epilogue PROTO ((void));
 void   arm_print_operand STDIO_PROTO ((FILE *, Rtx, int));
 void   arm_final_prescan_insn PROTO ((Rtx));
 int    short_branch PROTO ((int, int));

gcc/config/arm/arm.md

@@ -56,6 +56,11 @@
 ; LENGTH of an instruction (in bytes)
 (define_attr "length" "" (const_int 4))
 
+; POOL_RANGE is how far away from a constant pool entry that this insn
+; can be placed.  If the distance is zero, then this insn will never
+; reference the pool.
+(define_attr "pool_range" "" (const_int 0))
+
 ; An assembler sequence may clobber the condition codes without us knowing
 (define_asm_attributes
  [(set_attr "conds" "clob")
@@ -2146,7 +2151,8 @@
    and%?\\t%Q0, %1, #255\;mov%?\\t%R0, #0
    ldr%?b\\t%Q0, %1\;mov%?\\t%R0, #0"
 [(set_attr "length" "8")
- (set_attr "type" "*,load")])
+ (set_attr "type" "*,load")
+ (set_attr "pool_range" "*,4096")])
 
 (define_insn "extendsidi2"
   [(set (match_operand:DI 0 "s_register_operand" "=r")
@@ -2193,7 +2199,8 @@
 	(zero_extend:SI (match_operand:HI 1 "memory_operand" "m")))]
   "arm_arch4"
   "ldr%?h\\t%0, %1"
-[(set_attr "type" "load")])
+[(set_attr "type" "load")
+ (set_attr "pool_range" "256")])
 
 (define_split
   [(set (match_operand:SI 0 "s_register_operand" "")
@@ -2244,7 +2251,8 @@
 	(zero_extend:SI (match_operand:QI 1 "memory_operand" "m")))]
   ""
   "ldr%?b\\t%0, %1\\t%@ zero_extendqisi2"
-[(set_attr "type" "load")])
+[(set_attr "type" "load")
+ (set_attr "pool_range" "4096")])
 
 (define_split
   [(set (match_operand:SI 0 "s_register_operand" "")
@@ -2339,7 +2347,8 @@
 	(sign_extend:SI (match_operand:HI 1 "memory_operand" "m")))]
   "arm_arch4"
   "ldr%?sh\\t%0, %1"
-[(set_attr "type" "load")])
+[(set_attr "type" "load")
+ (set_attr "pool_range" "256")])
 
 (define_split
   [(set (match_operand:SI 0 "s_register_operand" "")
@@ -2408,7 +2417,8 @@
   return \"ldr%?sb\\t%0, %1\";
 "
 [(set_attr "type" "load")
- (set_attr "length" "8")])
+ (set_attr "length" "8")
+ (set_attr "pool_range" "256")])
 
 (define_split
   [(set (match_operand:HI 0 "s_register_operand" "")
@@ -2481,7 +2491,8 @@
   return \"ldr%?sb\\t%0, %1\";
 "
 [(set_attr "type" "load")
- (set_attr "length" "8")])
+ (set_attr "length" "8")
+ (set_attr "pool_range" "256")])
 
 (define_split
   [(set (match_operand:SI 0 "s_register_operand" "")
@@ -2609,7 +2620,8 @@
   return (output_move_double (operands));
 "
 [(set_attr "length" "8,8,8")
- (set_attr "type" "*,load,store2")])
+ (set_attr "type" "*,load,store2")
+ (set_attr "pool_range" "0,1020,0")])
 
 (define_expand "movsi"
   [(set (match_operand:SI 0 "general_operand" "")
@@ -2646,7 +2658,8 @@
    mvn%?\\t%0, #%B1
    ldr%?\\t%0, %1
    str%?\\t%1, %0"
-[(set_attr "type" "*,*,load,store1")])
+[(set_attr "type" "*,*,load,store1")
+ (set_attr "pool_range" "*,*,4096,*")])
 
 (define_split
   [(set (match_operand:SI 0 "s_register_operand" "")
@@ -2687,7 +2700,8 @@
 	(unspec:SI [(match_operand 1 "" "")] 3))]
   "flag_pic"
   "ldr%?\\t%0, %a1"
- [(set_attr "type" "load")])
+ [(set_attr "type" "load")
+  (set_attr "pool_range" "4096")])
 
 ;; This variant is used for AOF assembly, since it needs to mention the
 ;; pic register in the rtl.
@@ -2708,7 +2722,9 @@
 #endif
   output_asm_insn (\"ldr%?\\t%0, %a1\", operands);
   return \"\";
-" [(set_attr "type" "load")])
+"
+[(set_attr "type" "load")
+ (set_attr "pool_range" "4096")])
 
 (define_insn "pic_add_dot_plus_eight"
   [(set (match_operand 0 "register_operand" "+r")
@@ -3079,7 +3095,8 @@
    mvn%?\\t%0, #%B1\\t%@ movhi
    ldr%?h\\t%0, %1\\t%@ movhi
    str%?h\\t%1, %0\\t%@ movhi"
-[(set_attr "type" "*,*,load,store1")])
+[(set_attr "type" "*,*,load,store1")
+ (set_attr "pool_range" "*,*,256,*")])
 
 (define_insn "*movhi_insn_littleend"
   [(set (match_operand:HI 0 "s_register_operand" "=r,r,r")
@@ -3094,7 +3111,8 @@
    mov%?\\t%0, %1\\t%@ movhi
    mvn%?\\t%0, #%B1\\t%@ movhi
    ldr%?\\t%0, %1\\t%@ movhi"
-[(set_attr "type" "*,*,load")])
+[(set_attr "type" "*,*,load")
+ (set_attr "pool_range" "4096")])
 
 (define_insn "*movhi_insn_bigend"
   [(set (match_operand:HI 0 "s_register_operand" "=r,r,r")
@@ -3110,7 +3128,8 @@
    mvn%?\\t%0, #%B1\\t%@ movhi
    ldr%?\\t%0, %1\\t%@ movhi_bigend\;mov%?\\t%0, %0, asr #16"
 [(set_attr "type" "*,*,load")
- (set_attr "length" "4,4,8")])
+ (set_attr "length" "4,4,8")
+ (set_attr "pool_range" "*,*,4092")])
 
 (define_insn "*loadhi_si_bigend"
   [(set (match_operand:SI 0 "s_register_operand" "=r")
@@ -3119,7 +3138,8 @@
   "BYTES_BIG_ENDIAN
    && ! TARGET_SHORT_BY_BYTES"
   "ldr%?\\t%0, %1\\t%@ movhi_bigend"
-[(set_attr "type" "load")])
+[(set_attr "type" "load")
+ (set_attr "pool_range" "4096")])
 
 (define_insn "*movhi_bytes"
   [(set (match_operand:HI 0 "s_register_operand" "=r,r")
@@ -3212,7 +3232,8 @@
    str%?\\t%1, %0\\t%@ float"
 [(set_attr "length" "4,4,4,4,8,8,4,4,4")
  (set_attr "type"
-	 "ffarith,ffarith,f_load,f_store,r_mem_f,f_mem_r,*,load,store1")])
+	 "ffarith,ffarith,f_load,f_store,r_mem_f,f_mem_r,*,load,store1")
+ (set_attr "pool_range" "*,*,1024,*,*,*,*,4096,*")])
 
 ;; Exactly the same as above, except that all `f' cases are deleted.
 ;; This is necessary to prevent reload from ever trying to use a `f' reg
@@ -3228,7 +3249,8 @@
    ldr%?\\t%0, %1\\t%@ float
    str%?\\t%1, %0\\t%@ float"
 [(set_attr "length" "4,4,4")
- (set_attr "type" "*,load,store1")])
+ (set_attr "type" "*,load,store1")
+ (set_attr "pool_range" "*,4096,*")])
 
 (define_expand "movdf"
   [(set (match_operand:DF 0 "general_operand" "")
@@ -3306,7 +3328,8 @@
 "
 [(set_attr "length" "4,4,8,8,8,4,4,4,4,8,8")
  (set_attr "type"
-"load,store2,*,store2,load,ffarith,ffarith,f_load,f_store,r_mem_f,f_mem_r")])
+"load,store2,*,store2,load,ffarith,ffarith,f_load,f_store,r_mem_f,f_mem_r")
+ (set_attr "pool_range" "*,*,*,*,252,*,*,1024,*,*,*")])
 
 ;; Software floating point version.  This is essentially the same as movdi.
 ;; Do not use `f' as a constraint to prevent reload from ever trying to use
@@ -3318,7 +3341,8 @@
   "TARGET_SOFT_FLOAT"
   "* return output_move_double (operands);"
 [(set_attr "length" "8,8,8")
- (set_attr "type" "*,load,store2")])
+ (set_attr "type" "*,load,store2")
+ (set_attr "pool_range" "252")])
 
 (define_expand "movxf"
   [(set (match_operand:XF 0 "general_operand" "")
@@ -3347,7 +3371,8 @@
     }
 "
 [(set_attr "length" "4,4,4,4,8,8,12")
- (set_attr "type" "ffarith,ffarith,f_load,f_store,r_mem_f,f_mem_r,*")])
+ (set_attr "type" "ffarith,ffarith,f_load,f_store,r_mem_f,f_mem_r,*")
+ (set_attr "pool_range" "*,*,1024,*,*,*,*")])
 
 
 ;; load- and store-multiple insns
@@ -6097,6 +6122,27 @@
   DONE;
 ")
 
+(define_expand "epilogue"
+  [(unspec_volatile [(return)] 6)]
+  ""
+  "
+  if (USE_RETURN_INSN (FALSE))
+    {
+      emit_jump_insn (gen_return ());
+      DONE;
+    }
+")
+
+(define_insn "*epilogue_insn"
+  [(unspec_volatile [(return)] 6)]
+  ""
+  "*
+  return arm_output_epilogue ();
+"
+;; Length is absolute worst case
+[(set_attr "length" "44")
+ (set_attr "type" "block")])
+
 ;; This split is only used during output to reduce the number of patterns
 ;; that need assembler instructions adding to them.  We allowed the setting
 ;; of the conditions to be implicit during rtl generation so that