rs6000.md (define_attr "type"): Add two and three.

        * config/rs6000/rs6000.md (define_attr "type"): Add two and three.
        Change multi-instruction sequences to new attribute.
        * config/rs6000/{40x.md,440.md,603.md,6xx.md,
        7450.md,7xx.md,8540.md,mpc.md,power4.md,power5.md,
        rios1.md,rios2.md,rs64.md}: Add descriptions for two and three.

From-SVN: r90456

gcc/ChangeLog

+2004-11-10  David Edelsohn  <edelsohn@gnu.org>
+
+	* config/rs6000/rs6000.md (define_attr "type"): Add two and three.
+	Change multi-instruction sequences to new attribute.
+	* config/rs6000/{40x.md,440.md,603.md,6xx.md,
+	7450.md,7xx.md,8540.md,mpc.md,power4.md,power5.md,
+	rios1.md,rios2.md,rs64.md}: Add descriptions for two and three.
+
 2004-11-10  Daniel Berlin  <dberlin@dberlin.org>
 
 	* tree-data-ref.c (build_classic_dist_vector): If either loop

gcc/config/rs6000/40x.md

@@ -41,6 +41,16 @@
        (eq_attr "cpu" "ppc403,ppc405"))
   "iu_40x")
 
+(define_insn_reservation "ppc403-two" 1
+  (and (eq_attr "type" "two")
+       (eq_attr "cpu" "ppc403,ppc405"))
+  "iu_40x,iu_40x")
+
+(define_insn_reservation "ppc403-three" 1
+  (and (eq_attr "type" "three")
+       (eq_attr "cpu" "ppc403,ppc405"))
+  "iu_40x,iu_40x,iu_40x")
+
 (define_insn_reservation "ppc403-compare" 3
   (and (eq_attr "type" "cmp,fast_compare,compare,delayed_compare")
        (eq_attr "cpu" "ppc403,ppc405"))

gcc/config/rs6000/440.md

@@ -58,6 +58,18 @@
        (eq_attr "cpu" "ppc440"))
   "ppc440_issue,ppc440_i_pipe|ppc440_j_pipe")
 
+(define_insn_reservation "ppc440-two" 1
+  (and (eq_attr "type" "two")
+       (eq_attr "cpu" "ppc440"))
+  "ppc440_issue_0+ppc440_issue_1,\
+   ppc440_i_pipe|ppc440_j_pipe,ppc440_i_pipe|ppc440_j_pipe")
+
+(define_insn_reservation "ppc440-three" 1
+  (and (eq_attr "type" "three")
+       (eq_attr "cpu" "ppc440"))
+  "ppc440_issue_0+ppc440_issue_1,ppc440_i_pipe|ppc440_j_pipe,\
+   ppc440_i_pipe|ppc440_j_pipe,ppc440_i_pipe|ppc440_j_pipe")
+
 (define_insn_reservation "ppc440-imul" 3
   (and (eq_attr "type" "imul,imul_compare")
        (eq_attr "cpu" "ppc440"))

gcc/config/rs6000/603.md

@@ -58,6 +58,16 @@
        (eq_attr "cpu" "ppc603"))
   "iu_603")
 
+(define_insn_reservation "ppc603-two" 1
+  (and (eq_attr "type" "two")
+       (eq_attr "cpu" "ppc603"))
+  "iu_603,iu_603")
+
+(define_insn_reservation "ppc603-three" 1
+  (and (eq_attr "type" "three")
+       (eq_attr "cpu" "ppc603"))
+  "iu_603,iu_603,iu_603")
+
 ; This takes 2 or 3 cycles
 (define_insn_reservation "ppc603-imul" 3
   (and (eq_attr "type" "imul,imul_compare")

gcc/config/rs6000/6xx.md

@@ -68,6 +68,16 @@
        (eq_attr "cpu" "ppc604,ppc604e,ppc620,ppc630"))
   "iu1_6xx|iu2_6xx")
 
+(define_insn_reservation "ppc604-two" 1
+  (and (eq_attr "type" "two")
+       (eq_attr "cpu" "ppc604,ppc604e,ppc620,ppc630"))
+  "iu1_6xx|iu2_6xx,iu1_6xx|iu2_6xx")
+
+(define_insn_reservation "ppc604-three" 1
+  (and (eq_attr "type" "three")
+       (eq_attr "cpu" "ppc604,ppc604e,ppc620,ppc630"))
+  "iu1_6xx|iu2_6xx,iu1_6xx|iu2_6xx,iu1_6xx|iu2_6xx")
+
 (define_insn_reservation "ppc604-imul" 4
   (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
        (eq_attr "cpu" "ppc604"))

gcc/config/rs6000/7450.md

@@ -67,7 +67,18 @@
 (define_insn_reservation "ppc7450-integer" 1
   (and (eq_attr "type" "integer,insert_word")
        (eq_attr "cpu" "ppc7450"))
-  "ppc7450_du,(iu1_7450|iu2_7450|iu3_7450)")
+  "ppc7450_du,iu1_7450|iu2_7450|iu3_7450")
+
+(define_insn_reservation "ppc7450-two" 1
+  (and (eq_attr "type" "two")
+       (eq_attr "cpu" "ppc7450"))
+  "ppc7450_du,iu1_7450|iu2_7450|iu3_7450,iu1_7450|iu2_7450|iu3_7450")
+
+(define_insn_reservation "ppc7450-three" 1
+  (and (eq_attr "type" "three")
+       (eq_attr "cpu" "ppc7450"))
+  "ppc7450_du,iu1_7450|iu2_7450|iu3_7450,\
+   iu1_7450|iu2_7450|iu3_7450,iu1_7450|iu2_7450|iu3_7450")
 
 (define_insn_reservation "ppc7450-imul" 4
   (and (eq_attr "type" "imul,imul_compare")

gcc/config/rs6000/7xx.md

@@ -61,7 +61,17 @@
 (define_insn_reservation "ppc750-integer" 1
   (and (eq_attr "type" "integer,insert_word")
        (eq_attr "cpu" "ppc750,ppc7400"))
-  "ppc750_du,(iu1_7xx|iu2_7xx)")
+  "ppc750_du,iu1_7xx|iu2_7xx")
+
+(define_insn_reservation "ppc750-two" 1
+  (and (eq_attr "type" "two")
+       (eq_attr "cpu" "ppc750,ppc7400"))
+  "ppc750_du,iu1_7xx|iu2_7xx,iu1_7xx|iu2_7xx")
+
+(define_insn_reservation "ppc750-three" 1
+  (and (eq_attr "type" "three")
+       (eq_attr "cpu" "ppc750,ppc7400"))
+  "ppc750_du,iu1_7xx|iu2_7xx,iu1_7xx|iu2_7xx,iu1_7xx|iu2_7xx")
 
 (define_insn_reservation "ppc750-imul" 4
   (and (eq_attr "type" "imul,imul_compare")

gcc/config/rs6000/8540.md

@@ -89,6 +89,19 @@
        (eq_attr "cpu" "ppc8540"))
   "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
 
+(define_insn_reservation "ppc8540_two" 1
+  (and (eq_attr "type" "two")
+       (eq_attr "cpu" "ppc8540"))
+  "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire,\
+   ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
+
+(define_insn_reservation "ppc8540_three" 1
+  (and (eq_attr "type" "three")
+       (eq_attr "cpu" "ppc8540"))
+  "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire,\
+   ppc8540_issue+ppc8540_su_stage0+ppc8540_retire,\
+   ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
+
 ;; Branch.  Actually this latency time is not used by the scheduler.
 (define_insn_reservation "ppc8540_branch" 1
   (and (eq_attr "type" "jmpreg,branch")

gcc/config/rs6000/mpc.md

@@ -46,6 +46,16 @@
        (eq_attr "cpu" "mpccore"))
   "iu_mpc")
 
+(define_insn_reservation "mpccore-two" 1
+  (and (eq_attr "type" "two")
+       (eq_attr "cpu" "mpccore"))
+  "iu_mpc,iu_mpc")
+
+(define_insn_reservation "mpccore-three" 1
+  (and (eq_attr "type" "three")
+       (eq_attr "cpu" "mpccore"))
+  "iu_mpc,iu_mpc,iu_mpc")
+
 (define_insn_reservation "mpccore-imul" 2
   (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
        (eq_attr "cpu" "mpccore"))

gcc/config/rs6000/power4.md

@@ -183,6 +183,26 @@
        (eq_attr "cpu" "power4"))
   "iq_power4")
 
+(define_insn_reservation "power4-two" 2
+  (and (eq_attr "type" "two")
+       (eq_attr "cpu" "power4"))
+  "(du1_power4+du2_power4,iu1_power4,nothing,iu2_power4)\
+  |(du2_power4+du3_power4,iu2_power4,nothing,iu2_power4)\
+  |(du3_power4+du4_power4,iu2_power4,nothing,iu1_power4)\
+  |(du4_power4+du1_power4,iu1_power4,nothing,iu1_power4)")
+
+(define_insn_reservation "power4-three" 2
+  (and (eq_attr "type" "three")
+       (eq_attr "cpu" "power4"))
+  "(du1_power4+du2_power4+du3_power4,\
+    iu1_power4,nothing,iu2_power4,nothing,iu2_power4)\
+  |(du2_power4+du3_power4+du4_power4,\
+    iu2_power4,nothing,iu2_power4,nothing,iu1_power4)\
+  |(du3_power4+du4_power4+du1_power4,\
+    iu2_power4,nothing,iu1_power4,nothing,iu1_power4)\
+  |(du4_power4+du1_power4+du2_power4,\
+    iu1_power4,nothing,iu2_power4,nothing,iu2_power4)")
+
 (define_insn_reservation "power4-insert" 4
   (and (eq_attr "type" "insert_word")
        (eq_attr "cpu" "power4"))

gcc/config/rs6000/power5.md

@@ -142,6 +142,26 @@
        (eq_attr "cpu" "power5"))
   "iq_power5")
 
+(define_insn_reservation "power5-two" 2
+  (and (eq_attr "type" "two")
+       (eq_attr "cpu" "power5"))
+  "(du1_power5+du2_power5,iu1_power5,nothing,iu2_power5)\
+  |(du2_power5+du3_power5,iu2_power5,nothing,iu2_power5)\
+  |(du3_power5+du4_power5,iu2_power5,nothing,iu1_power5)\
+  |(du4_power5+du1_power5,iu1_power5,nothing,iu1_power5)")
+
+(define_insn_reservation "power5-three" 2
+  (and (eq_attr "type" "three")
+       (eq_attr "cpu" "power5"))
+  "(du1_power5+du2_power5+du3_power5,\
+    iu1_power5,nothing,iu2_power5,nothing,iu2_power5)\
+  |(du2_power5+du3_power5+du4_power5,\
+    iu2_power5,nothing,iu2_power5,nothing,iu1_power5)\
+  |(du3_power5+du4_power5+du1_power5,\
+    iu2_power5,nothing,iu1_power5,nothing,iu1_power5)\
+  |(du4_power5+du1_power5+du2_power5,\
+    iu1_power5,nothing,iu2_power5,nothing,iu2_power5)")
+
 (define_insn_reservation "power5-insert" 4
   (and (eq_attr "type" "insert_word")
        (eq_attr "cpu" "power5"))

gcc/config/rs6000/rios1.md

@@ -55,6 +55,16 @@
        (eq_attr "cpu" "rios1,ppc601"))
   "iu_rios1")
 
+(define_insn_reservation "rios1-two" 1
+  (and (eq_attr "type" "two")
+       (eq_attr "cpu" "rios1,ppc601"))
+  "iu_rios1,iu_rios1")
+
+(define_insn_reservation "rios1-three" 1
+  (and (eq_attr "type" "three")
+       (eq_attr "cpu" "rios1,ppc601"))
+  "iu_rios1,iu_rios1,iu_rios1")
+
 (define_insn_reservation "rios1-imul" 5
   (and (eq_attr "type" "imul,imul_compare")
        (eq_attr "cpu" "rios1"))

gcc/config/rs6000/rios2.md

@@ -43,6 +43,16 @@
        (eq_attr "cpu" "rios2"))
   "iu1_rios2|iu2_rios2")
 
+(define_insn_reservation "rios2-two" 1
+  (and (eq_attr "type" "two")
+       (eq_attr "cpu" "rios2"))
+  "iu1_rios2|iu2_rios2,iu1_rios2|iu2_rios2")
+
+(define_insn_reservation "rios2-three" 1
+  (and (eq_attr "type" "three")
+       (eq_attr "cpu" "rios2"))
+  "iu1_rios2|iu2_rios2,iu1_rios2|iu2_rios2,iu1_rios2|iu2_rios2")
+
 (define_insn_reservation "rios2-imul" 2
   (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
        (eq_attr "cpu" "rios2"))

gcc/config/rs6000/rs64.md

@@ -46,6 +46,16 @@
        (eq_attr "cpu" "rs64a"))
   "iu_rs64")
 
+(define_insn_reservation "rs64a-two" 1
+  (and (eq_attr "type" "two")
+       (eq_attr "cpu" "rs64a"))
+  "iu_rs64,iu_rs64")
+
+(define_insn_reservation "rs64a-three" 1
+  (and (eq_attr "type" "three")
+       (eq_attr "cpu" "rs64a"))
+  "iu_rs64,iu_rs64,iu_rs64")
+
 (define_insn_reservation "rs64a-imul" 20
   (and (eq_attr "type" "imul,imul_compare")
        (eq_attr "cpu" "rs64a"))