Commit 94324dae by Eric Botcazou Committed by Eric Botcazou

passes.texi: Standardize spelling of RTL, Tree and Tree SSA.

	* doc/passes.texi: Standardize spelling of RTL, Tree and Tree SSA.
	Remove outdated reference to flow.c and fix nits.
	* doc/gccint.texi: Tweak RTL description.
	* doc/rtl.texi: Likewise.

From-SVN: r147821
parent 22702f93
2009-05-23 Eric Botcazou <ebotcazou@adacore.com>
* doc/passes.texi: Standardize spelling of RTL, Tree and Tree SSA.
Remove outdated reference to flow.c and fix nits.
* doc/gccint.texi: Tweak RTL description.
* doc/rtl.texi: Likewise.
2009-05-23 Denis Chertykov <chertykov@gmail.com> 2009-05-23 Denis Chertykov <chertykov@gmail.com>
* config/avr/avr.c: Change my email address. * config/avr/avr.c: Change my email address.
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...@@ -109,10 +109,10 @@ Additional tutorial information is linked to from ...@@ -109,10 +109,10 @@ Additional tutorial information is linked to from
* Options:: Option specification files. * Options:: Option specification files.
* Passes:: Order of passes, what they do, and what each file is for. * Passes:: Order of passes, what they do, and what each file is for.
* Trees:: The source representation used by the C and C++ front ends. * Trees:: The source representation used by the C and C++ front ends.
* RTL:: The intermediate representation that most passes work on.
* GENERIC:: Language-independent representation generated by Front Ends * GENERIC:: Language-independent representation generated by Front Ends
* GIMPLE:: Tuple representation used by Tree SSA optimizers * GIMPLE:: Tuple representation used by Tree SSA optimizers
* Tree SSA:: Analysis and optimization of GIMPLE * Tree SSA:: Analysis and optimization of GIMPLE
* RTL:: Machine-dependent low-level intermediate representation.
* Control Flow:: Maintaining and manipulating the control flow graph. * Control Flow:: Maintaining and manipulating the control flow graph.
* Loop Analysis and Representation:: Analysis and representation of loops * Loop Analysis and Representation:: Analysis and representation of loops
* Machine Desc:: How to write machine description instruction patterns. * Machine Desc:: How to write machine description instruction patterns.
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...@@ -10,10 +10,10 @@ ...@@ -10,10 +10,10 @@
@cindex representation of RTL @cindex representation of RTL
@cindex Register Transfer Language (RTL) @cindex Register Transfer Language (RTL)
Most of the work of the compiler is done on an intermediate representation The last part of the compiler work is done on a low-level intermediate
called register transfer language. In this language, the instructions to be representation called Register Transfer Language. In this language, the
output are described, pretty much one by one, in an algebraic form that instructions to be output are described, pretty much one by one, in an
describes what the instruction does. algebraic form that describes what the instruction does.
RTL is inspired by Lisp lists. It has both an internal form, made up of RTL is inspired by Lisp lists. It has both an internal form, made up of
structures that point at other structures, and a textual form that is used structures that point at other structures, and a textual form that is used
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