config.gcc (arm-wrs-vxworks): Remove dbxelf.h from tm_file.

gcc/
	* config.gcc (arm-wrs-vxworks): Remove dbxelf.h from tm_file.
	Add vx-common.h.  Include vxworks.h between vx-common.h and
	arm/vxworks.h.
	* config/vx-common.h (DWARF2_UNWIND_INFO): Undefine before
	redefining.
	* config/vxworks.h (TARGET_ASM_CONSTRUCTOR): Likewise.
	(TARGET_ASM_DESTRUCTOR): Likewise.
	* config/arm/vxworks.h (TARGET_OS_CPP_BUILTINS): Check arm_arch_xscale
	instead of arm_is_xscale.  Use VXWORKS_OS_CPP_BUILTINS.
	(OVERRIDE_OPTIONS, SUBTARGET_CPP_SPEC): Define.
	(CC1_SPEC): Add -tstrongarm.  Line up backslashes.
	(VXWORKS_ENDIAN_SPEC): Define.
	(ASM_SPEC): Add VXWORKS_ENDIAN_SPEC.
	(LIB_SPEC, STARTFILE_SPEC, ENDFILE_SPEC): Redefine to their
	VXWORKS_* equivalents.
	(LINK_SPEC): Likewise, but add VXWORKS_ENDIAN_SPEC.
	(ASM_FILE_START): Delete.
	(TARGET_VERSION): Reformat.
	(FPUTYPE_DEFAULT, FUNCTION_PROFILER): Define.
	(DEFAULT_STRUCTURE_SIZE_BOUNDARY): Define.
	* config/arm/t-vxworks (LIB1ASMSRC, LIB1ASMFUNCS): Define.
	(FPBIT, DPBIT): Define.
	(fp-bit.c, dp-bit.c): New rules.
	(MULTILIB_OPTIONS): Add strongarm, -mrtp and -mrtp/-fPIC multilibs.
	(MULTILIB_MATCHES, MULTILIB_EXCEPTIONS): Define.
	* config/arm/arm-protos.h (arm_emit_call_insn): Declare.
	* config/arm/arm.h: Include vxworks-dummy.h.
	* config/arm/arm.c (arm_elf_asm_constructor, arm_elf_asm_destructor):
	Mark with ATTRIBUTE_UNUSED.
	(arm_override_options): Do not allow VxWorks RTP PIC to be used
	for Thumb.  Force r9 to be the PIC register for VxWorks RTPs and
	make it incompatible with -msingle-pic-base.
	(arm_function_ok_for_sibcall): Return false for calls that might
	go through a VxWorks PIC PLT entry.
	(require_pic_register): New function, split out from...
	(legitimize_pic_address): ...here.  Do not use GOTOFF accesses
	for VxWorks RTPs.
	(arm_load_pic_register): Handle the VxWorks RTP initialization
	sequence.  Use pic_reg as a shorthand for cfun->machine->pic_reg.
	(arm_emit_call_insn): New function.
	(arm_assemble_integer): Do not use GOTOFF accesses for VxWorks RTP.
	* config/arm/arm.md (UNSPEC_PIC_OFFSET): New unspec number.
	(pic_offset_arm): New pattern.
	(call, call_value): Use arm_emit_call_insn.
	(call_internal, call_value_internal): New expanders.
	* config/arm/lib1funcs.asm (__PLT__): Define to empty for
	VxWorks unless __PIC__.

From-SVN: r125196

gcc/ChangeLog

+2007-05-30  Richard Sandiford  <richard@codesourcery.com>
+
+	* config.gcc (arm-wrs-vxworks): Remove dbxelf.h from tm_file.
+	Add vx-common.h.  Include vxworks.h between vx-common.h and
+	arm/vxworks.h.
+	* config/vx-common.h (DWARF2_UNWIND_INFO): Undefine before
+	redefining.
+	* config/vxworks.h (TARGET_ASM_CONSTRUCTOR): Likewise.
+	(TARGET_ASM_DESTRUCTOR): Likewise.
+	* config/arm/vxworks.h (TARGET_OS_CPP_BUILTINS): Check arm_arch_xscale
+	instead of arm_is_xscale.  Use VXWORKS_OS_CPP_BUILTINS.
+	(OVERRIDE_OPTIONS, SUBTARGET_CPP_SPEC): Define.
+	(CC1_SPEC): Add -tstrongarm.  Line up backslashes.
+	(VXWORKS_ENDIAN_SPEC): Define.
+	(ASM_SPEC): Add VXWORKS_ENDIAN_SPEC.
+	(LIB_SPEC, STARTFILE_SPEC, ENDFILE_SPEC): Redefine to their
+	VXWORKS_* equivalents.
+	(LINK_SPEC): Likewise, but add VXWORKS_ENDIAN_SPEC.
+	(ASM_FILE_START): Delete.
+	(TARGET_VERSION): Reformat.
+	(FPUTYPE_DEFAULT, FUNCTION_PROFILER): Define.
+	(DEFAULT_STRUCTURE_SIZE_BOUNDARY): Define.
+	* config/arm/t-vxworks (LIB1ASMSRC, LIB1ASMFUNCS): Define.
+	(FPBIT, DPBIT): Define.
+	(fp-bit.c, dp-bit.c): New rules.
+	(MULTILIB_OPTIONS): Add strongarm, -mrtp and -mrtp/-fPIC multilibs.
+	(MULTILIB_MATCHES, MULTILIB_EXCEPTIONS): Define.
+	* config/arm/arm-protos.h (arm_emit_call_insn): Declare.
+	* config/arm/arm.h: Include vxworks-dummy.h.
+	* config/arm/arm.c (arm_elf_asm_constructor, arm_elf_asm_destructor):
+	Mark with ATTRIBUTE_UNUSED.
+	(arm_override_options): Do not allow VxWorks RTP PIC to be used
+	for Thumb.  Force r9 to be the PIC register for VxWorks RTPs and
+	make it incompatible with -msingle-pic-base.
+	(arm_function_ok_for_sibcall): Return false for calls that might
+	go through a VxWorks PIC PLT entry.
+	(require_pic_register): New function, split out from...
+	(legitimize_pic_address): ...here.  Do not use GOTOFF accesses
+	for VxWorks RTPs.
+	(arm_load_pic_register): Handle the VxWorks RTP initialization
+	sequence.  Use pic_reg as a shorthand for cfun->machine->pic_reg.
+	(arm_emit_call_insn): New function.
+	(arm_assemble_integer): Do not use GOTOFF accesses for VxWorks RTP.
+	* config/arm/arm.md (UNSPEC_PIC_OFFSET): New unspec number.
+	(pic_offset_arm): New pattern.
+	(call, call_value): Use arm_emit_call_insn.
+	(call_internal, call_value_internal): New expanders.
+	* config/arm/lib1funcs.asm (__PLT__): Define to empty for
+	VxWorks unless __PIC__.
+
 2007-05-30  Eric Christopher  <echristo@gmail.com>
 
 	* genrecog.c: Include regs.h in generated file.

gcc/config.gcc

@@ -697,7 +697,7 @@ arm-semi-aof | armel-semi-aof)
 	tmake_file="arm/t-arm arm/t-semi"
 	;;
 arm-wrs-vxworks)
-	tm_file="dbxelf.h elfos.h svr4.h vxworks.h arm/elf.h arm/aout.h ${tm_file} arm/vxworks.h"
+	tm_file="elfos.h svr4.h arm/elf.h arm/aout.h ${tm_file} vx-common.h vxworks.h arm/vxworks.h"
 	tmake_file="${tmake_file} arm/t-arm arm/t-vxworks"
 	;;
 arm*-*-freebsd*|strongarm*-*-freebsd*)

gcc/config/arm/arm-protos.h

@@ -102,6 +102,7 @@ extern void arm_reload_out_hi (rtx *);
 extern int arm_const_double_inline_cost (rtx);
 extern bool arm_const_double_by_parts (rtx);
 extern const char *fp_immediate_constant (rtx);
+extern void arm_emit_call_insn (rtx, rtx);
 extern const char *output_call (rtx *);
 extern const char *output_call_mem (rtx *);
 extern const char *output_mov_long_double_fpa_from_arm (rtx *);

gcc/config/arm/arm.h

@@ -26,6 +26,8 @@
 #ifndef GCC_ARM_H
 #define GCC_ARM_H
 
+#include "config/vxworks-dummy.h"
+
 /* The architecture define.  */
 extern char arm_arch_name[];
 

gcc/config/arm/arm.md

@@ -95,6 +95,8 @@
                          ; instruction stream.
    (UNSPEC_STACK_ALIGN 20) ; Doubleword aligned stack pointer.  Used to
 			   ; generate correct unwind information.
+   (UNSPEC_PIC_OFFSET 22) ; A symbolic 12-bit OFFSET that has been treated
+			  ; correctly for PIC usage.
   ]
 )
 
@@ -4919,6 +4921,16 @@
   ""
 )
 
+(define_insn "pic_offset_arm"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+	(mem:SI (plus:SI (match_operand:SI 1 "register_operand" "r")
+			 (unspec:SI [(match_operand:SI 2 "" "X")]
+				    UNSPEC_PIC_OFFSET))))]
+  "TARGET_VXWORKS_RTP && TARGET_ARM && flag_pic"
+  "ldr%?\\t%0, [%1,%2]"
+  [(set_attr "type" "load1")]
+)
+
 (define_expand "builtin_setjmp_receiver"
   [(label_ref (match_operand 0 "" ""))]
   "flag_pic"
@@ -8145,7 +8157,7 @@
   "TARGET_EITHER"
   "
   {
-    rtx callee;
+    rtx callee, pat;
     
     /* In an untyped call, we can get NULL for operand 2.  */
     if (operands[2] == NULL_RTX)
@@ -8159,9 +8171,19 @@
 	? arm_is_long_call_p (SYMBOL_REF_DECL (callee))
 	: !REG_P (callee))
       XEXP (operands[0], 0) = force_reg (Pmode, callee);
+
+    pat = gen_call_internal (operands[0], operands[1], operands[2]);
+    arm_emit_call_insn (pat, XEXP (operands[0], 0));
+    DONE;
   }"
 )
 
+(define_expand "call_internal"
+  [(parallel [(call (match_operand 0 "memory_operand" "")
+	            (match_operand 1 "general_operand" ""))
+	      (use (match_operand 2 "" ""))
+	      (clobber (reg:SI LR_REGNUM))])])
+
 (define_insn "*call_reg_armv5"
   [(call (mem:SI (match_operand:SI 0 "s_register_operand" "r"))
          (match_operand 1 "" ""))
@@ -8239,7 +8261,7 @@
   "TARGET_EITHER"
   "
   {
-    rtx callee;
+    rtx pat, callee;
     
     /* In an untyped call, we can get NULL for operand 2.  */
     if (operands[3] == 0)
@@ -8253,9 +8275,21 @@
 	? arm_is_long_call_p (SYMBOL_REF_DECL (callee))
 	: !REG_P (callee))
       XEXP (operands[1], 0) = force_reg (Pmode, callee);
+
+    pat = gen_call_value_internal (operands[0], operands[1],
+				   operands[2], operands[3]);
+    arm_emit_call_insn (pat, XEXP (operands[1], 0));
+    DONE;
   }"
 )
 
+(define_expand "call_value_internal"
+  [(parallel [(set (match_operand       0 "" "")
+	           (call (match_operand 1 "memory_operand" "")
+		         (match_operand 2 "general_operand" "")))
+	      (use (match_operand 3 "" ""))
+	      (clobber (reg:SI LR_REGNUM))])])
+
 (define_insn "*call_value_reg_armv5"
   [(set (match_operand 0 "" "")
         (call (mem:SI (match_operand:SI 1 "s_register_operand" "r"))

gcc/config/arm/lib1funcs.asm

@@ -54,6 +54,8 @@ Boston, MA 02110-1301, USA.  */
 #ifdef __ELF__
 #ifdef __thumb__
 #define __PLT__  /* Not supported in Thumb assembler (for now).  */
+#elif defined __vxworks && !defined __PIC__
+#define __PLT__ /* Not supported by the kernel loader.  */
 #else
 #define __PLT__ (PLT)
 #endif

gcc/config/arm/t-vxworks

-# Multilibs for VxWorks.
+LIB1ASMSRC = arm/lib1funcs.asm
+LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func _call_via_rX _interwork_call_via_rX
 
-MULTILIB_OPTIONS = \
-  t4/t4be/t4t/t4tbe/t5/t5be/t5t/t5tbe/txscale/txscalebe
+# We want fine grained libraries, so use the new code to build the
+# floating point emulation libraries.
+FPBIT = fp-bit.c
+DPBIT = dp-bit.c
+
+fp-bit.c: $(srcdir)/config/fp-bit.c
+	echo '#define FLOAT' > fp-bit.c
+	echo '#ifndef __ARMEB__' >> fp-bit.c
+	echo '#define FLOAT_BIT_ORDER_MISMATCH' >> fp-bit.c
+	echo '#endif' >> fp-bit.c
+	cat $(srcdir)/config/fp-bit.c >> fp-bit.c
 
-MULTILIB_DIRNAMES = \
-  ARMARCH4gnu ARMARCH4gnube ARMARCH4_Tgnu ARMARCH4_Tgnube \
-  ARMARCH5gnu ARMARCH5gnube ARMARCH5_Tgnu ARMARCH5_Tgnube \
-  XSCALEgnu XSCALEgnube
+dp-bit.c: $(srcdir)/config/fp-bit.c
+	echo '#ifndef __ARMEB__' > dp-bit.c
+	echo '#define FLOAT_BIT_ORDER_MISMATCH' >> dp-bit.c
+	echo '#endif' >> dp-bit.c
+	cat $(srcdir)/config/fp-bit.c >> dp-bit.c
 
+MULTILIB_OPTIONS = \
+  mrtp fPIC \
+  t4/t4be/t4t/t4tbe/t5/t5be/t5t/t5tbe/tstrongarm/txscale/txscalebe
+MULTILIB_MATCHES = fPIC=fpic
+# Don't build -fPIC multilibs for kernel or Thumb code.
+MULTILIB_EXCEPTIONS = fPIC* mrtp/fPIC/*t[45]t*

gcc/config/arm/vxworks.h

@@ -25,13 +25,12 @@ Boston, MA 02110-1301, USA.  */
 
 #define TARGET_OS_CPP_BUILTINS()		\
   do {						\
-    builtin_define ("__vxworks");		\
     if (TARGET_BIG_END)				\
       builtin_define ("ARMEB");			\
     else					\
       builtin_define ("ARMEL");			\
 						\
-    if (arm_is_xscale)				\
+    if (arm_arch_xscale)			\
       builtin_define ("CPU=XSCALE");		\
     else if (arm_arch5)				\
       builtin_define ("CPU=ARMARCH5");		\
@@ -42,54 +41,70 @@ Boston, MA 02110-1301, USA.  */
 	else					\
 	  builtin_define ("CPU=ARMARCH4");	\
       }						\
+    VXWORKS_OS_CPP_BUILTINS ();			\
   } while (0)
 
+#undef OVERRIDE_OPTIONS
+#define OVERRIDE_OPTIONS			\
+  do						\
+    {						\
+      VXWORKS_OVERRIDE_OPTIONS;			\
+      arm_override_options ();			\
+    }						\
+  while (0)
+
+/* Subsume the arm/elf.h definition, and add RTP hooks.  */
+#undef SUBTARGET_CPP_SPEC
+#define SUBTARGET_CPP_SPEC "-D__ELF__" VXWORKS_ADDITIONAL_CPP_SPEC
+
 #undef  CC1_SPEC
 #define CC1_SPEC							\
-"%{t4:        -mlittle-endian -march=armv4 ;			\
-   t4be:      -mbig-endian -march=armv4 ;			\
+"%{tstrongarm:-mlittle-endian -mcpu=strongarm ;				\
+   t4:        -mlittle-endian -march=armv4 ;				\
+   t4be:      -mbig-endian -march=armv4 ;				\
    t4t:       -mthumb -mthumb-interwork -mlittle-endian -march=armv4t ;	\
    t4tbe:     -mthumb -mthumb-interwork -mbig-endian -march=armv4t ;	\
-   t5:        -mlittle-endian -march=armv5 ;			\
-   t5be:      -mbig-endian -march=armv5 ;			\
+   t5:        -mlittle-endian -march=armv5 ;				\
+   t5be:      -mbig-endian -march=armv5 ;				\
    t5t:       -mthumb -mthumb-interwork -mlittle-endian -march=armv5 ;	\
    t5tbe:     -mthumb -mthumb-interwork -mbig-endian -march=armv5 ;	\
-   txscale:   -mlittle-endian -mcpu=xscale ;			\
-   txscalebe: -mbig-endian -mcpu=xscale ;			\
+   txscale:   -mlittle-endian -mcpu=xscale ;				\
+   txscalebe: -mbig-endian -mcpu=xscale ;				\
             : -march=armv4}"
 
+/* Pass -EB for big-endian targets.  */
+#define VXWORKS_ENDIAN_SPEC \
+  "%{mbig-endian|t4be|t4tbe|t5be|t5tbe|txscalebe:-EB}"
+
 /* The -Q options from svr4.h aren't understood and must be removed.  */
 #undef  ASM_SPEC
 #define ASM_SPEC \
-  "%{v:-V} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*}"
+  "%{v:-V} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*} " VXWORKS_ENDIAN_SPEC
 
-/* VxWorks does all the library stuff itself.  */
-#undef  LIB_SPEC
-#define LIB_SPEC 	""
+#undef LINK_SPEC
+#define LINK_SPEC VXWORKS_LINK_SPEC " " VXWORKS_ENDIAN_SPEC
 
-/* VxWorks uses object files, not loadable images.  make linker just
-   combine objects.  */
-#undef  LINK_SPEC
-#define LINK_SPEC 	"-r"
+#undef LIB_SPEC
+#define LIB_SPEC VXWORKS_LIB_SPEC
 
-/* VxWorks provides the functionality of crt0.o and friends itself.  */
-#undef  STARTFILE_SPEC
-#define STARTFILE_SPEC 	""
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC VXWORKS_STARTFILE_SPEC
 
-#undef  ENDFILE_SPEC
-#define ENDFILE_SPEC 	""
+#undef ENDFILE_SPEC
+#define ENDFILE_SPEC VXWORKS_ENDFILE_SPEC
 
-#undef  TARGET_VERSION
-#define TARGET_VERSION	fputs (" (ARM/VxWorks)", stderr);
+#undef TARGET_VERSION
+#define TARGET_VERSION fputs (" (ARM/VxWorks)", stderr);
 
 /* There is no default multilib.  */
 #undef MULTILIB_DEFAULTS
 
-#undef  ASM_FILE_START
-#define ASM_FILE_START(STREAM) 						\
-  do 									\
-    {									\
-      fprintf (STREAM, "%s Generated by GCC %s for ARM/VxWorks\n",	\
-	       ASM_COMMENT_START, version_string);			\
-    }									\
-  while (0)
+#define FPUTYPE_DEFAULT FPUTYPE_VFP
+
+#undef FUNCTION_PROFILER
+#define FUNCTION_PROFILER VXWORKS_FUNCTION_PROFILER
+
+/* We want to be compatible with a version of "2.96" at one point in
+   the past before this macro was changed.  */
+#undef DEFAULT_STRUCTURE_SIZE_BOUNDARY
+#define DEFAULT_STRUCTURE_SIZE_BOUNDARY 8

gcc/config/vx-common.h

@@ -63,6 +63,7 @@ Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
 #define WINT_TYPE_SIZE 16
 
 /* Dwarf2 unwind info is not supported.  */
+#undef DWARF2_UNWIND_INFO
 #define DWARF2_UNWIND_INFO 0
 
 /* VxWorks uses DWARF2.  */

gcc/config/vxworks.h

@@ -92,7 +92,9 @@ extern void vxworks_override_options (void);
 
 /* VxWorks requires special handling of constructors and destructors.
    All VxWorks configurations must use these functions.  */
+#undef TARGET_ASM_CONSTRUCTOR
 #define TARGET_ASM_CONSTRUCTOR vxworks_asm_out_constructor
+#undef TARGET_ASM_DESTRUCTOR
 #define TARGET_ASM_DESTRUCTOR vxworks_asm_out_destructor
 extern void vxworks_asm_out_constructor (rtx symbol, int priority);
 extern void vxworks_asm_out_destructor (rtx symbol, int priority);