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riscv-gcc-1
Commit 93f9a911 by Richard Henderson Committed by Richard Henderson
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mn10300.md (fmasf4, [...]): Rename from fmaddsf4, fmsubsf4, fnmaddsf4, fnmsubsf4 respectively. 

        * config/mn10300/mn10300.md (fmasf4, fmssf4, fnmasf4, fnmssf4): Rename
        from fmaddsf4, fmsubsf4, fnmaddsf4, fnmsubsf4 respectively.  Use
        fma rtx_code.

From-SVN: r166790
parent be2fbfb6
Showing with 26 additions and 20 deletions
gcc/ChangeLog
2010-11-15 Richard Henderson <rth@redhat.com> 2010-11-15 Richard Henderson <rth@redhat.com>
* config/mn10300/mn10300.md (fmasf4, fmssf4, fnmasf4, fnmssf4): Rename
from fmaddsf4, fmsubsf4, fnmaddsf4, fnmsubsf4 respectively. Use
fma rtx_code.
2010-11-15 Richard Henderson <rth@redhat.com>
* config/frv/frv.md (fmasf4, fmssf4): Rename from *muladdsf4 * config/frv/frv.md (fmasf4, fmssf4): Rename from *muladdsf4
and *mulsubsf4 respectively. Use fma rtx_code. and *mulsubsf4 respectively. Use fma rtx_code.
gcc/config/mn10300/mn10300.md
...@@ -2866,11 +2866,11 @@ ...@@ -2866,11 +2866,11 @@
] ]
) )
(define_insn "fmaddsf4" (define_insn "fmasf4"
[(set (match_operand:SF 0 "register_operand" "=A") [(set (match_operand:SF 0 "register_operand" "=A")
(plus:SF (mult:SF (match_operand:SF 1 "register_operand" "%f") (fma:SF (match_operand:SF 1 "register_operand" "f")
(match_operand:SF 2 "register_operand" "f")) (match_operand:SF 2 "register_operand" "f")
(match_operand:SF 3 "register_operand" "f"))) (match_operand:SF 3 "register_operand" "f")))
(clobber (reg:CC_FLOAT CC_REG)) (clobber (reg:CC_FLOAT CC_REG))
] ]
"TARGET_AM33_2" "TARGET_AM33_2"
...@@ -2879,11 +2879,11 @@ ...@@ -2879,11 +2879,11 @@
(const_int 17) (const_int 24)))] (const_int 17) (const_int 24)))]
) )
(define_insn "fmsubsf4" (define_insn "fmssf4"
[(set (match_operand:SF 0 "register_operand" "=A") [(set (match_operand:SF 0 "register_operand" "=A")
(minus:SF (mult:SF (match_operand:SF 1 "register_operand" "%f") (fma:SF (match_operand:SF 1 "register_operand" "f")
(match_operand:SF 2 "register_operand" "f")) (match_operand:SF 2 "register_operand" "f")
(match_operand:SF 3 "register_operand" "f"))) (neg:SF (match_operand:SF 3 "register_operand" "f"))))
(clobber (reg:CC_FLOAT CC_REG)) (clobber (reg:CC_FLOAT CC_REG))
] ]
"TARGET_AM33_2" "TARGET_AM33_2"
...@@ -2892,11 +2892,11 @@ ...@@ -2892,11 +2892,11 @@
(const_int 17) (const_int 24)))] (const_int 17) (const_int 24)))]
) )
(define_insn "fnmaddsf4" (define_insn "fnmasf4"
[(set (match_operand:SF 0 "register_operand" "=A") [(set (match_operand:SF 0 "register_operand" "=A")
(minus:SF (match_operand:SF 3 "register_operand" "f") (fma:SF (neg:SF (match_operand:SF 1 "register_operand" "f"))
(mult:SF (match_operand:SF 1 "register_operand" "%f") (match_operand:SF 2 "register_operand" "f")
(match_operand:SF 2 "register_operand" "f")))) (match_operand:SF 3 "register_operand" "f")))
(clobber (reg:CC_FLOAT CC_REG)) (clobber (reg:CC_FLOAT CC_REG))
] ]
"TARGET_AM33_2" "TARGET_AM33_2"
...@@ -2905,11 +2905,11 @@ ...@@ -2905,11 +2905,11 @@
(const_int 17) (const_int 24)))] (const_int 17) (const_int 24)))]
) )
(define_insn "fnmsubsf4" (define_insn "fnmssf4"
[(set (match_operand:SF 0 "register_operand" "=A") [(set (match_operand:SF 0 "register_operand" "=A")
(minus:SF (neg:SF (mult:SF (match_operand:SF 1 "register_operand" "%f") (fma:SF (neg:SF (match_operand:SF 1 "register_operand" "f"))
(match_operand:SF 2 "register_operand" "f"))) (match_operand:SF 2 "register_operand" "f")
(match_operand:SF 3 "register_operand" "f"))) (neg:SF (match_operand:SF 3 "register_operand" "f"))))
(clobber (reg:CC_FLOAT CC_REG)) (clobber (reg:CC_FLOAT CC_REG))
] ]
"TARGET_AM33_2" "TARGET_AM33_2"
......
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