re PR target/64208 ([iwmmxt] ICE: internal compiler error: Max. number of…

re PR target/64208 ([iwmmxt] ICE: internal compiler error: Max. number of generated reload insns per insn is achieved (90))

gcc/
2015-05-06  Yvan Roux  <yvan.roux@linaro.org>

	PR target/64208
	* config/arm/iwmmxt.md ("*iwmmxt_arm_movdi"): Cleanup redundant
	alternatives.

gcc/testsuite/
2015-05-06  Yvan Roux  <yvan.roux@linaro.org>

	PR target/64208
	* gcc.target/arm/pr64208.c: New test.

From-SVN: r222853

gcc/ChangeLog

+2015-05-06  Yvan Roux  <yvan.roux@linaro.org>
+
+	PR target/64208
+	* config/arm/iwmmxt.md ("*iwmmxt_arm_movdi"): Cleanup redundant
+	alternatives.
+
 2015-05-06  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 
 	* config/aarch64/geniterators.sh: Use standard BRE in sed.

gcc/config/arm/iwmmxt.md

@@ -107,8 +107,8 @@
 )
 
 (define_insn "*iwmmxt_arm_movdi"
-  [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m,y,y,yr,y,yrUy,*w, r,*w,*w, *Uv")
-        (match_operand:DI 1 "di_operand"              "rDa,Db,Dc,mi,r,y,yr,y,yrUy,y, r,*w,*w,*Uvi,*w"))]
+  [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m,y,y,r, y,Uy,*w, r,*w,*w, *Uv")
+        (match_operand:DI 1 "di_operand"              "rDa,Db,Dc,mi,r,y,r,y,Uy,y,  r,*w,*w,*Uvi,*w"))]
   "TARGET_REALLY_IWMMXT
    && (   register_operand (operands[0], DImode)
        || register_operand (operands[1], DImode))"

gcc/testsuite/ChangeLog

+2015-05-06  Yvan Roux  <yvan.roux@linaro.org>
+
+	PR target/64208
+	* gcc.target/arm/pr64208.c: New test.
+
 2015-05-06  Alan Modra  <amodra@gmail.com>
 
 	PR target/66020

gcc/testsuite/gcc.target/arm/pr64208.c

+/* { dg-do compile } */
+/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mcpu=*" } { "-mcpu=iwmmxt" } } */
+/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-mabi=*" } { "-mabi=iwmmxt" } } */
+/* { dg-skip-if "Test is specific to the iWMMXt" { arm*-*-* } { "-march=*" } { "-march=iwmmxt" } } */
+/* { dg-skip-if "Test is specific to ARM mode" { arm*-*-* } { "-mthumb" } { "" } } */
+/* { dg-require-effective-target arm32 } */
+/* { dg-require-effective-target arm_iwmmxt_ok } */
+/* { dg-options "-O1 -mcpu=iwmmxt" } */
+
+long long x6(void);
+void x7(long long, long long);
+void x8(long long);
+
+int x0;
+long long *x1;
+
+void x2(void) {
+  long long *x3 = x1;
+  while (x1) {
+    long long x4 = x0, x5 = x6();
+    x7(x4, x5);
+    x8(x5);
+    *x3 = 0;
+  }
+}