Commit 9381e3f1 by Wolfgang Gellerich Committed by Andreas Krebbel

2008-08-15 Wolfgang Gellerich <gellerich@de.ibm.com>

	* config/s390/2097.md New file.
	* config/s390/s390.md ("z10prop" attribute): Define none,
        z10_super, z10_super_E1, z10_super_A1, z10_super_c,
        z10_super_c_E1, z10_fwd, z10_fwd_A1, z10_fwd_A3, z10_fwd_E1,
        z10_rec, z10_fr, z10_fr_A3, z10_fr_E1, z10_c, and z10_cobra as
        possible values and apply them to insns as appropriate.
        ("type" attribute): Removed itof and added ftrunctf,ftruncdf,
        ftruncsd, ftruncdd, itoftf, itofdf, itofsf, itofdd, itoftd,
        fdivdd, fdivtd, floaddd, floadsd, fmuldd, fmultd, fsimpdd,
        fsimpsd, fsimptd, fstoredd, fstoresd, ftoidfp as possible
        values.
	("bfp" mode attribute): Removed.  Every occurence replaced
	with <mode>.
	* config/s390/s390.c (struct "z10_cost"): Updated entries.
	* config/s390/2084.md (insn_reservation "x_itof"): Updated
          type attribute.

From-SVN: r139124
parent 501bbad7
2008-08-15 Wolfgang Gellerich <gellerich@de.ibm.com>
* config/s390/2097.md New file.
* config/s390/s390.md ("z10prop" attribute): Define none,
z10_super, z10_super_E1, z10_super_A1, z10_super_c,
z10_super_c_E1, z10_fwd, z10_fwd_A1, z10_fwd_A3, z10_fwd_E1,
z10_rec, z10_fr, z10_fr_A3, z10_fr_E1, z10_c, and z10_cobra as
possible values and apply them to insns as appropriate.
("type" attribute): Removed itof and added ftrunctf,ftruncdf,
ftruncsd, ftruncdd, itoftf, itofdf, itofsf, itofdd, itoftd,
fdivdd, fdivtd, floaddd, floadsd, fmuldd, fmultd, fsimpdd,
fsimpsd, fsimptd, fstoredd, fstoresd, ftoidfp as possible
values.
("bfp" mode attribute): Removed. Every occurence replaced
with <mode>.
* config/s390/s390.c (struct "z10_cost"): Updated entries.
* config/s390/2084.md (insn_reservation "x_itof"): Updated
type attribute.
2008-08-14 Manuel Lopez-Ibanez <manu@gcc.gnu.org> 2008-08-14 Manuel Lopez-Ibanez <manu@gcc.gnu.org>
PR c/28152 PR c/28152
......
...@@ -243,7 +243,7 @@ ...@@ -243,7 +243,7 @@
(define_insn_reservation "x_itof" 7 (define_insn_reservation "x_itof" 7
(and (eq_attr "cpu" "z990,z9_109") (and (eq_attr "cpu" "z990,z9_109")
(eq_attr "type" "itof")) (eq_attr "type" "itoftf,itofdf,itofsf"))
"x_e1_t*3,x-wr-fp") "x_e1_t*3,x-wr-fp")
(define_bypass 1 "x_fsimpdf" "x_fstoredf") (define_bypass 1 "x_fsimpdf" "x_fstoredf")
......
...@@ -192,33 +192,33 @@ struct processor_costs z9_109_cost = ...@@ -192,33 +192,33 @@ struct processor_costs z9_109_cost =
static const static const
struct processor_costs z10_cost = struct processor_costs z10_cost =
{ {
COSTS_N_INSNS (4), /* M */ COSTS_N_INSNS (10), /* M */
COSTS_N_INSNS (2), /* MGHI */ COSTS_N_INSNS (10), /* MGHI */
COSTS_N_INSNS (2), /* MH */ COSTS_N_INSNS (10), /* MH */
COSTS_N_INSNS (2), /* MHI */ COSTS_N_INSNS (10), /* MHI */
COSTS_N_INSNS (4), /* ML */ COSTS_N_INSNS (10), /* ML */
COSTS_N_INSNS (4), /* MR */ COSTS_N_INSNS (10), /* MR */
COSTS_N_INSNS (5), /* MS */ COSTS_N_INSNS (10), /* MS */
COSTS_N_INSNS (6), /* MSG */ COSTS_N_INSNS (10), /* MSG */
COSTS_N_INSNS (4), /* MSGF */ COSTS_N_INSNS (10), /* MSGF */
COSTS_N_INSNS (4), /* MSGFR */ COSTS_N_INSNS (10), /* MSGFR */
COSTS_N_INSNS (4), /* MSGR */ COSTS_N_INSNS (10), /* MSGR */
COSTS_N_INSNS (4), /* MSR */ COSTS_N_INSNS (10), /* MSR */
COSTS_N_INSNS (1), /* multiplication in DFmode */ COSTS_N_INSNS (10), /* multiplication in DFmode */
COSTS_N_INSNS (28), /* MXBR */ COSTS_N_INSNS (50), /* MXBR */
COSTS_N_INSNS (130), /* SQXBR */ COSTS_N_INSNS (120), /* SQXBR */
COSTS_N_INSNS (66), /* SQDBR */ COSTS_N_INSNS (52), /* SQDBR */
COSTS_N_INSNS (38), /* SQEBR */ COSTS_N_INSNS (38), /* SQEBR */
COSTS_N_INSNS (1), /* MADBR */ COSTS_N_INSNS (10), /* MADBR */
COSTS_N_INSNS (1), /* MAEBR */ COSTS_N_INSNS (10), /* MAEBR */
COSTS_N_INSNS (60), /* DXBR */ COSTS_N_INSNS (111), /* DXBR */
COSTS_N_INSNS (40), /* DDBR */ COSTS_N_INSNS (39), /* DDBR */
COSTS_N_INSNS (26), /* DEBR */ COSTS_N_INSNS (32), /* DEBR */
COSTS_N_INSNS (30), /* DLGR */ COSTS_N_INSNS (160), /* DLGR */
COSTS_N_INSNS (23), /* DLR */ COSTS_N_INSNS (71), /* DLR */
COSTS_N_INSNS (23), /* DR */ COSTS_N_INSNS (71), /* DR */
COSTS_N_INSNS (24), /* DSGFR */ COSTS_N_INSNS (71), /* DSGFR */
COSTS_N_INSNS (24), /* DSGR */ COSTS_N_INSNS (71), /* DSGR */
}; };
extern int reload_completed; extern int reload_completed;
...@@ -5266,6 +5266,7 @@ s390_agen_dep_p (rtx dep_insn, rtx insn) ...@@ -5266,6 +5266,7 @@ s390_agen_dep_p (rtx dep_insn, rtx insn)
return 0; return 0;
} }
/* A C statement (sans semicolon) to update the integer scheduling priority /* A C statement (sans semicolon) to update the integer scheduling priority
INSN_PRIORITY (INSN). Increase the priority to execute the INSN earlier, INSN_PRIORITY (INSN). Increase the priority to execute the INSN earlier,
reduce the priority to execute INSN later. Do not define this macro if reduce the priority to execute INSN later. Do not define this macro if
......
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