Commit 93733789 by Kyrylo Tkachov Committed by Kyrylo Tkachov

[arm] Make ACLE builtins use arm_* namespace for expanders

The builtins from <arm_acle.h> use fairly general expander names such as
"crc", "mcr" etc.
These run the risk of being reserved by the midend in the future.
Let's namespace them to arm_* as is convention.

	* config/arm/arm-builtins.c (acle_builtin_data): Expand VAR1 to
	CODE_FOR_arm_##.
	* config/arm/arm.md (<crc_variant>): Rename to...
	(arm_<crc_variant>): ... This.
	(<cdp>): Rename to...
	(arm_<cdp>): ... This.
	(<ldc>): Rename to...
	(arm_<ldc>): ... This.
	(<stc>): Rename to...
	(arm_<stc>): ... This.
	(<mcr>): Rename to...
	(arm_<mcr>): ... This.
	(<mrc>): Rename to...
	(arm_<mrc>): ... This.
	(<mcrr>): Rename to...
	(arm_<mcrr>): ... This.
	(<mrrc>): Rename to...
	(arm_<mrrc>): ... This.

From-SVN: r273879
parent 50c2df93
2019-07-29 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm-builtins.c (acle_builtin_data): Expand VAR1 to
CODE_FOR_arm_##.
* config/arm/arm.md (<crc_variant>): Rename to...
(arm_<crc_variant>): ... This.
(<cdp>): Rename to...
(arm_<cdp>): ... This.
(<ldc>): Rename to...
(arm_<ldc>): ... This.
(<stc>): Rename to...
(arm_<stc>): ... This.
(<mcr>): Rename to...
(arm_<mcr>): ... This.
(<mrc>): Rename to...
(arm_<mrc>): ... This.
(<mcrr>): Rename to...
(arm_<mcrr>): ... This.
(<mrrc>): Rename to...
(arm_<mrrc>): ... This.
2019-07-29 Richard Biener <rguenther@suse.de> 2019-07-29 Richard Biener <rguenther@suse.de>
PR tree-optimization/91257 PR tree-optimization/91257
......
...@@ -376,7 +376,7 @@ static arm_builtin_datum neon_builtin_data[] = ...@@ -376,7 +376,7 @@ static arm_builtin_datum neon_builtin_data[] =
#undef CF #undef CF
#undef VAR1 #undef VAR1
#define VAR1(T, N, A) \ #define VAR1(T, N, A) \
{#N, UP (A), CODE_FOR_##N, 0, T##_QUALIFIERS}, {#N, UP (A), CODE_FOR_arm_##N, 0, T##_QUALIFIERS},
static arm_builtin_datum acle_builtin_data[] = static arm_builtin_datum acle_builtin_data[] =
{ {
......
...@@ -12062,7 +12062,7 @@ ...@@ -12062,7 +12062,7 @@
(set_attr "predicable" "yes")]) (set_attr "predicable" "yes")])
;; ARMv8 CRC32 instructions. ;; ARMv8 CRC32 instructions.
(define_insn "<crc_variant>" (define_insn "arm_<crc_variant>"
[(set (match_operand:SI 0 "s_register_operand" "=r") [(set (match_operand:SI 0 "s_register_operand" "=r")
(unspec:SI [(match_operand:SI 1 "s_register_operand" "r") (unspec:SI [(match_operand:SI 1 "s_register_operand" "r")
(match_operand:<crc_mode> 2 "s_register_operand" "r")] (match_operand:<crc_mode> 2 "s_register_operand" "r")]
...@@ -12178,7 +12178,7 @@ ...@@ -12178,7 +12178,7 @@
DONE; DONE;
}) })
(define_insn "<cdp>" (define_insn "arm_<cdp>"
[(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n") [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n")
(match_operand:SI 1 "immediate_operand" "n") (match_operand:SI 1 "immediate_operand" "n")
(match_operand:SI 2 "immediate_operand" "n") (match_operand:SI 2 "immediate_operand" "n")
...@@ -12224,19 +12224,19 @@ ...@@ -12224,19 +12224,19 @@
[(set_attr "length" "4") [(set_attr "length" "4")
(set_attr "type" "coproc")]) (set_attr "type" "coproc")])
(define_expand "<ldc>" (define_expand "arm_<ldc>"
[(unspec_volatile [(match_operand:SI 0 "immediate_operand") [(unspec_volatile [(match_operand:SI 0 "immediate_operand")
(match_operand:SI 1 "immediate_operand") (match_operand:SI 1 "immediate_operand")
(mem:SI (match_operand:SI 2 "s_register_operand"))] LDCI)] (mem:SI (match_operand:SI 2 "s_register_operand"))] LDCI)]
"arm_coproc_builtin_available (VUNSPEC_<LDC>)") "arm_coproc_builtin_available (VUNSPEC_<LDC>)")
(define_expand "<stc>" (define_expand "arm_<stc>"
[(unspec_volatile [(match_operand:SI 0 "immediate_operand") [(unspec_volatile [(match_operand:SI 0 "immediate_operand")
(match_operand:SI 1 "immediate_operand") (match_operand:SI 1 "immediate_operand")
(mem:SI (match_operand:SI 2 "s_register_operand"))] STCI)] (mem:SI (match_operand:SI 2 "s_register_operand"))] STCI)]
"arm_coproc_builtin_available (VUNSPEC_<STC>)") "arm_coproc_builtin_available (VUNSPEC_<STC>)")
(define_insn "<mcr>" (define_insn "arm_<mcr>"
[(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n") [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n")
(match_operand:SI 1 "immediate_operand" "n") (match_operand:SI 1 "immediate_operand" "n")
(match_operand:SI 2 "s_register_operand" "r") (match_operand:SI 2 "s_register_operand" "r")
...@@ -12256,7 +12256,7 @@ ...@@ -12256,7 +12256,7 @@
[(set_attr "length" "4") [(set_attr "length" "4")
(set_attr "type" "coproc")]) (set_attr "type" "coproc")])
(define_insn "<mrc>" (define_insn "arm_<mrc>"
[(set (match_operand:SI 0 "s_register_operand" "=r") [(set (match_operand:SI 0 "s_register_operand" "=r")
(unspec_volatile:SI [(match_operand:SI 1 "immediate_operand" "n") (unspec_volatile:SI [(match_operand:SI 1 "immediate_operand" "n")
(match_operand:SI 2 "immediate_operand" "n") (match_operand:SI 2 "immediate_operand" "n")
...@@ -12275,7 +12275,7 @@ ...@@ -12275,7 +12275,7 @@
[(set_attr "length" "4") [(set_attr "length" "4")
(set_attr "type" "coproc")]) (set_attr "type" "coproc")])
(define_insn "<mcrr>" (define_insn "arm_<mcrr>"
[(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n") [(unspec_volatile [(match_operand:SI 0 "immediate_operand" "n")
(match_operand:SI 1 "immediate_operand" "n") (match_operand:SI 1 "immediate_operand" "n")
(match_operand:DI 2 "s_register_operand" "r") (match_operand:DI 2 "s_register_operand" "r")
...@@ -12291,7 +12291,7 @@ ...@@ -12291,7 +12291,7 @@
[(set_attr "length" "4") [(set_attr "length" "4")
(set_attr "type" "coproc")]) (set_attr "type" "coproc")])
(define_insn "<mrrc>" (define_insn "arm_<mrrc>"
[(set (match_operand:DI 0 "s_register_operand" "=r") [(set (match_operand:DI 0 "s_register_operand" "=r")
(unspec_volatile:DI [(match_operand:SI 1 "immediate_operand" "n") (unspec_volatile:DI [(match_operand:SI 1 "immediate_operand" "n")
(match_operand:SI 2 "immediate_operand" "n") (match_operand:SI 2 "immediate_operand" "n")
......
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