Accept k8-sse3, opteron-sse3 and athlon64-sse3 as improved versions of…

Accept k8-sse3, opteron-sse3 and athlon64-sse3 as improved versions of k8,opteron and athlon64 with SSE3 instruction set support From-SVN: r124340

Accept k8-sse3, opteron-sse3 and athlon64-sse3 as improved versions of…
Accept k8-sse3, opteron-sse3 and athlon64-sse3 as improved versions of k8,opteron and athlon64 with SSE3 instruction set support From-SVN: r124340
9369ed95 · Dwarakanath Rajagopal · ed99bffc · 9369ed95
Commit 9369ed95 authored May 01, 2007 by Dwarakanath Rajagopal
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+++ b/gcc/ChangeLog
 2007-05-01  Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>

+	* config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3 
+	and athlon64-sse3 as improved versions of k8, opteron and athlon64 
+	with SSE3 instruction set support.
+	* doc/invoke.texi: Likewise.
+	
+2007-05-01  Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
+
 	* config/i386/i386.c (override_options): Tuning 32-byte loop
 	alignment for amdfam10 architecture. Increasing the max loop 
 	alignment to 24 bytes.