m68hc11.c (m68hc11_symbolic_p): New function.

	* config/m68hc11/m68hc11.c (m68hc11_symbolic_p): New function.
	(m68hc11_indirect_p): New function.
	(m68hc11_override_options): Must set MASK_NO_DIRECT_MODE for 68HC12.
	(m68hc11_gen_highpart): Use TARGET_NO_DIRECT_MODE instead of
	TARGET_M6812.
	(asm_print_register): Likewise.
	* config/m68hc11/m68hc11-protos.h (m68hc11_symbolic_p): Declare.
	(m68hc11_indirect_p): Declare.
	* config/m68hc11/m68hc11.h (EXTRA_CONSTRAINT): New constraint 'R', 'Q'.
	(TARGET_NO_DIRECT_MODE, TARGET_RELAX): New.
	(TARGET_SWITCHES): New option -mrelax.
	* config/m68hc11/m68hc11.md ("andsi3"): Allow soft register for
	destination.
	("iorsi3", "xorsi3"): Likewise.
	("andhi3", "andqi3", "iorhi3", "iorqi3"): Use a define_expand.
	("*andhi3_mem"): New to handle destination in memory with bclr
	and a scratch register.
	("*andqi3_mem", "*iorhi3_mem", "*iorqi3_mem"): Likewise.
	("*andhi3_const"): New when operand2 is constant.
	("*andqi3_const", "*iorhi3_const", "*iorqi3_const"): Likewise.
	("*andhi3_gen"): Cleanup of the old "andhi3".
	("*andqi3_gen", "*iorhi3_gen", "*iorqi3_gen"): Likewise.
	("xorqi3"): Update constraints.

From-SVN: r50843

gcc/ChangeLog

 2002-03-15  Stephane Carrez  <Stephane.Carrez@worldnet.fr>
 
+	* config/m68hc11/m68hc11.c (m68hc11_symbolic_p): New function.
+	(m68hc11_indirect_p): New function.
+	(m68hc11_override_options): Must set MASK_NO_DIRECT_MODE for 68HC12.
+	(m68hc11_gen_highpart): Use TARGET_NO_DIRECT_MODE instead of
+	TARGET_M6812.
+	(asm_print_register): Likewise.
+	* config/m68hc11/m68hc11-protos.h (m68hc11_symbolic_p): Declare.
+	(m68hc11_indirect_p): Declare.
+	* config/m68hc11/m68hc11.h (EXTRA_CONSTRAINT): New constraint 'R', 'Q'.
+	(TARGET_NO_DIRECT_MODE, TARGET_RELAX): New.
+	(TARGET_SWITCHES): New option -mrelax.
+	* config/m68hc11/m68hc11.md ("andsi3"): Allow soft register for
+	destination.
+	("iorsi3", "xorsi3"): Likewise.
+	("andhi3", "andqi3", "iorhi3", "iorqi3"): Use a define_expand.
+	("*andhi3_mem"): New to handle destination in memory with bclr
+	and a scratch register.
+	("*andqi3_mem", "*iorhi3_mem", "*iorqi3_mem"): Likewise.
+	("*andhi3_const"): New when operand2 is constant.
+	("*andqi3_const", "*iorhi3_const", "*iorqi3_const"): Likewise.
+	("*andhi3_gen"): Cleanup of the old "andhi3".
+	("*andqi3_gen", "*iorhi3_gen", "*iorqi3_gen"): Likewise.
+	("xorqi3"): Update constraints.
+
+2002-03-15  Stephane Carrez  <Stephane.Carrez@worldnet.fr>
+
 	* config/m68hc11/m68hc11.c (m68hc11_small_indexed_indirect_p): Look
 	for reg_equiv_memory_loc when the operand is a register that does
 	not get a hard register (stack location).

gcc/config/m68hc11/m68hc11-protos.h

@@ -106,6 +106,8 @@ extern void m68hc11_emit_libcall PARAMS((const char*, enum rtx_code,
                                          enum machine_mode, enum machine_mode,
                                          int, rtx*));
 extern int m68hc11_small_indexed_indirect_p PARAMS((rtx, enum machine_mode));
+extern int m68hc11_symbolic_p PARAMS((rtx, enum machine_mode));
+extern int m68hc11_indirect_p PARAMS((rtx, enum machine_mode));
 extern int go_if_legitimate_address2 PARAMS((rtx, enum machine_mode, int));
 
 extern int reg_or_indexed_operand PARAMS((rtx,enum machine_mode));

gcc/config/m68hc11/m68hc11.c

@@ -276,6 +276,7 @@ m68hc11_override_options ()
       m68hc11_sp_correction = 0;
       m68hc11_tmp_regs_class = TMP_REGS;
       target_flags &= ~MASK_M6811;
+      target_flags |= MASK_NO_DIRECT_MODE;
       if (m68hc11_soft_reg_count == 0)
 	m68hc11_soft_reg_count = "2";
     }
@@ -927,6 +928,42 @@ reg_or_some_mem_operand (operand, mode)
 }
 
 int
+m68hc11_symbolic_p (operand, mode)
+     rtx operand;
+     enum machine_mode mode;
+{
+  if (GET_CODE (operand) == MEM)
+    {
+      rtx op = XEXP (operand, 0);
+
+      if (symbolic_memory_operand (op, mode))
+	return 1;
+    }
+  return 0;
+}
+
+int
+m68hc11_indirect_p (operand, mode)
+     rtx operand;
+     enum machine_mode mode;
+{
+  if (GET_CODE (operand) == MEM)
+    {
+      rtx op = XEXP (operand, 0);
+
+      if (symbolic_memory_operand (op, mode))
+	return 0;
+
+      if (reload_in_progress)
+        return 1;
+
+      operand = XEXP (operand, 0);
+      return register_indirect_p (operand, mode, reload_completed);
+    }
+  return 0;
+}
+
+int
 stack_register_operand (operand, mode)
      rtx operand;
      enum machine_mode mode ATTRIBUTE_UNUSED;
@@ -1950,8 +1987,9 @@ m68hc11_gen_highpart (mode, x)
     {
       int pos;
 
-      /* For 68HC12, avoid the '*' for direct addressing mode.  */
-      pos = TARGET_M6812 ? 1 : 0;
+      /* Avoid the '*' for direct addressing mode when this
+         addressing mode is disabled.  */
+      pos = TARGET_NO_DIRECT_MODE ? 1 : 0;
       return gen_rtx (MEM, QImode,
 		      gen_rtx (SYMBOL_REF, Pmode,
 			       &reg_names[REGNO (x)][pos]));
@@ -2079,7 +2117,7 @@ asm_print_register (file, regno)
 {
   const char *name = reg_names[regno];
 
-  if (TARGET_M6812 && name[0] == '*')
+  if (TARGET_NO_DIRECT_MODE && name[0] == '*')
     name++;
 
   asm_fprintf (file, "%s", name);

gcc/config/m68hc11/m68hc11.h

@@ -118,12 +118,15 @@ extern short *reg_renumber;	/* def in local_alloc.c */
 #define MASK_AUTO_INC_DEC       0004
 #define MASK_M6811              0010
 #define MASK_M6812              0020
+#define MASK_NO_DIRECT_MODE     0040
 
 #define TARGET_OP_TIME		(optimize && optimize_size == 0)
 #define TARGET_SHORT            (target_flags & MASK_SHORT)
 #define TARGET_M6811            (target_flags & MASK_M6811)
 #define TARGET_M6812            (target_flags & MASK_M6812)
 #define TARGET_AUTO_INC_DEC     (target_flags & MASK_AUTO_INC_DEC)
+#define TARGET_NO_DIRECT_MODE   (target_flags & MASK_NO_DIRECT_MODE)
+#define TARGET_RELAX            (TARGET_NO_DIRECT_MODE)
 
 /* Default target_flags if no switches specified.  */
 #ifndef TARGET_DEFAULT
@@ -156,6 +159,8 @@ extern short *reg_renumber;	/* def in local_alloc.c */
     N_("Auto pre/post decrement increment allowed")},		\
   { "noauto-incdec", - MASK_AUTO_INC_DEC,			\
     N_("Auto pre/post decrement increment not allowed")},	\
+  { "relax", MASK_NO_DIRECT_MODE,                               \
+    N_("Do not use direct addressing mode for soft registers")},\
   { "68hc11", MASK_M6811,					\
     N_("Compile for a 68HC11")},				\
   { "68hc12", MASK_M6812,					\
@@ -830,7 +835,9 @@ extern enum reg_class m68hc11_tmp_regs_class;
 /* 'U' represents certain kind of memory indexed operand for 68HC12.
    and any memory operand for 68HC11.  */
 #define EXTRA_CONSTRAINT(OP, C)                         \
-((C) == 'U' ? m68hc11_small_indexed_indirect_p (OP, GET_MODE (OP)) : 0)
+((C) == 'U' ? m68hc11_small_indexed_indirect_p (OP, GET_MODE (OP)) \
+ : (C) == 'Q' ? m68hc11_symbolic_p (OP, GET_MODE (OP)) \
+ : (C) == 'R' ? m68hc11_indirect_p (OP, GET_MODE (OP)) : 0)