s390.md (UNSPEC_SRST): New constant.

	* config/s390/s390.md (UNSPEC_SRST): New constant.
	("strlendi", "strlensi"): New expanders.
	("*strlendi", "*strlensi"): New insns.

Co-Authored-By: Mark Dettinger <dettinge@de.ibm.com>

From-SVN: r74794

gcc/ChangeLog

+2003-12-18  Ulrich Weigand  <uweigand@de.ibm.com>
+	    Mark Dettinger  <dettinge@de.ibm.com>
+
+	* config/s390/s390.md (UNSPEC_SRST): New constant.
+	("strlendi", "strlensi"): New expanders.
+	("*strlendi", "*strlensi"): New insns.
+
 2003-12-18  Mark Mitchell  <mark@codesourcery.com>
 
 	* config/sol2.h (LINK_ARCH32_SPEC): Define in terms of ...

gcc/config/s390/s390.md

@@ -104,6 +104,9 @@
    (UNSPEC_TP			510)
    (UNSPEC_TLSLDM_NTPOFF	511)
    (UNSPEC_TLS_LOAD		512)
+
+   ; String Functions
+   (UNSPEC_SRST		600)
  ])
 
 ;;
@@ -1734,6 +1737,82 @@
 ;;
 
 ;
+; strlenM instruction pattern(s).
+;
+
+(define_expand "strlendi"
+  [(set (reg:QI 0) (match_operand:QI 2 "immediate_operand" ""))
+   (parallel 
+    [(set (match_dup 4)
+	  (unspec:DI [(const_int 0)
+		      (match_operand:BLK 1 "memory_operand" "")
+		      (reg:QI 0)
+		      (match_operand 3 "immediate_operand" "")] UNSPEC_SRST))
+     (clobber (scratch:DI))
+     (clobber (reg:CC 33))])
+   (parallel
+    [(set (match_operand:DI 0 "register_operand" "")
+          (minus:DI (match_dup 4) (match_dup 5)))
+     (clobber (reg:CC 33))])]
+  "TARGET_64BIT"
+{
+  operands[4] = gen_reg_rtx (DImode);
+  operands[5] = gen_reg_rtx (DImode);
+  emit_move_insn (operands[5], force_operand (XEXP (operands[1], 0), NULL_RTX));
+  operands[1] = replace_equiv_address (operands[1], operands[5]);
+})
+
+(define_insn "*strlendi"
+  [(set (match_operand:DI 0 "register_operand" "=a")
+	(unspec:DI [(match_operand:DI 2 "general_operand" "0")
+		    (mem:BLK (match_operand:DI 3 "register_operand" "1"))
+		    (reg:QI 0)
+		    (match_operand 4 "immediate_operand" "")] UNSPEC_SRST))
+   (clobber (match_scratch:DI 1 "=a"))
+   (clobber (reg:CC 33))]
+  "TARGET_64BIT"
+  "srst\t%0,%1\;jo\t.-4"
+  [(set_attr "op_type" "NN")
+   (set_attr "type"    "vs")
+   (set_attr "length"  "8")])
+
+(define_expand "strlensi"
+  [(set (reg:QI 0) (match_operand:QI 2 "immediate_operand" ""))
+   (parallel 
+    [(set (match_dup 4)
+	  (unspec:SI [(const_int 0)
+		      (match_operand:BLK 1 "memory_operand" "")
+		      (reg:QI 0)
+		      (match_operand 3 "immediate_operand" "")] UNSPEC_SRST))
+     (clobber (scratch:SI))
+     (clobber (reg:CC 33))])
+   (parallel
+    [(set (match_operand:SI 0 "register_operand" "")
+          (minus:SI (match_dup 4) (match_dup 5)))
+     (clobber (reg:CC 33))])]
+  "!TARGET_64BIT"
+{
+  operands[4] = gen_reg_rtx (SImode);
+  operands[5] = gen_reg_rtx (SImode);
+  emit_move_insn (operands[5], force_operand (XEXP (operands[1], 0), NULL_RTX));
+  operands[1] = replace_equiv_address (operands[1], operands[5]);
+})
+
+(define_insn "*strlensi"
+  [(set (match_operand:SI 0 "register_operand" "=a")
+	(unspec:SI [(match_operand:SI 2 "general_operand" "0")
+		    (mem:BLK (match_operand:SI 3 "register_operand" "1"))
+		    (reg:QI 0)
+		    (match_operand 4 "immediate_operand" "")] UNSPEC_SRST))
+   (clobber (match_scratch:SI 1 "=a"))
+   (clobber (reg:CC 33))]	
+  "!TARGET_64BIT"
+  "srst\t%0,%1\;jo\t.-4"
+  [(set_attr "op_type" "NN")
+   (set_attr "type"    "vs")
+   (set_attr "length"  "8")])
+
+;
 ; movstrM instruction pattern(s).
 ;