Commit 91afd29b by Oleg Endo

sh.h (BRANCH_COST): Use sh_branch_cost variable.

	* config/sh/sh.h (BRANCH_COST): Use sh_branch_cost variable.
	* config/sh/sh.c (sh_option_override): Simplify sh_branch_cost
        expression.

From-SVN: r182723
parent 81ed42d3
2011-12-29 Oleg Endo <olegendo@gcc.gnu.org>
* config/sh/sh.h (BRANCH_COST): Use sh_branch_cost variable.
* config/sh/sh.c (sh_option_override): Simplify sh_branch_cost
expression.
2011-12-28 Ian Lance Taylor <iant@google.com> 2011-12-28 Ian Lance Taylor <iant@google.com>
* dwarf2out.c (gen_compile_unit_die): Use DW_LANG_Go for Go. * dwarf2out.c (gen_compile_unit_die): Use DW_LANG_Go for Go.
...@@ -724,8 +724,15 @@ sh_option_override (void) ...@@ -724,8 +724,15 @@ sh_option_override (void)
else else
sh_divsi3_libfunc = "__sdivsi3"; sh_divsi3_libfunc = "__sdivsi3";
if (sh_branch_cost == -1) if (sh_branch_cost == -1)
sh_branch_cost {
= TARGET_SH5 ? 1 : ! TARGET_SH2 || TARGET_HARD_SH4 ? 2 : 1; sh_branch_cost = 1;
/* The SH1 does not have delay slots, hence we get a pipeline stall
at every branch. The SH4 is superscalar, so the single delay slot
is not sufficient to keep both pipelines filled. */
if (! TARGET_SH2 || TARGET_HARD_SH4)
sh_branch_cost = 2;
}
for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
if (! VALID_REGISTER_P (regno)) if (! VALID_REGISTER_P (regno))
......
...@@ -2088,12 +2088,8 @@ struct sh_args { ...@@ -2088,12 +2088,8 @@ struct sh_args {
different code that does fewer memory accesses. */ different code that does fewer memory accesses. */
/* A C expression for the cost of a branch instruction. A value of 1 /* A C expression for the cost of a branch instruction. A value of 1
is the default; other values are interpreted relative to that. is the default; other values are interpreted relative to that. */
The SH1 does not have delay slots, hence we get a pipeline stall #define BRANCH_COST(speed_p, predictable_p) sh_branch_cost
at every branch. The SH4 is superscalar, so the single delay slot
is not sufficient to keep both pipelines filled. */
#define BRANCH_COST(speed_p, predictable_p) \
(TARGET_SH5 ? 1 : ! TARGET_SH2 || TARGET_HARD_SH4 ? 2 : 1)
/* Assembler output control. */ /* Assembler output control. */
......
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