re PR target/70799 (STV pass does not convert DImode shifts)

	PR target/70799
	* config/i386/i386.c (dimode_scalar_to_vector_candidate_p):
	Handle ASHIFT and LSHIFTRT.
	(dimode_scalar_chain::compute_convert_gain): Ditto.
	(dimode_scalar_chain::convert_insn): Ditto.

testsuite/ChangeLog:

	PR target/70799
	* gcc.target/i386/pr70799-2.c: New test.

From-SVN: r241974

gcc/ChangeLog

+2016-11-08  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/70799
+	* config/i386/i386.c (dimode_scalar_to_vector_candidate_p):
+	Handle ASHIFT and LSHIFTRT.
+	(dimode_scalar_chain::compute_convert_gain): Ditto.
+	(dimode_scalar_chain::convert_insn): Ditto.
+
 2016-11-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
 	* gimple-ssa-store-merging.c: Include selftest.h
@@ -94,7 +102,7 @@
 2016-11-07  Jakub Jelinek  <jakub@redhat.com>
 
 	PR target/78229
-	* config/i386/i386.c (ix86_gimple_fold_builtin): Do not adjust                                                                             
+	* config/i386/i386.c (ix86_gimple_fold_builtin): Do not adjust
 	EH info even for bzhi and pdep/pext.
 
 2016-11-07  Peter Bergner  <bergner@vnet.ibm.com>

gcc/config/i386/i386.c

@@ -2805,11 +2805,24 @@ dimode_scalar_to_vector_candidate_p (rtx_insn *insn)
 
   switch (GET_CODE (src))
     {
+    case ASHIFT:
+    case LSHIFTRT:
+      /* Consider only non-variable shifts narrower
+	 than general register width.  */
+      if (!(CONST_INT_P (XEXP (src, 1))
+	    && IN_RANGE (INTVAL (XEXP (src, 1)), 0, 31)))
+	return false;
+      break;
+
     case PLUS:
     case MINUS:
     case IOR:
     case XOR:
     case AND:
+      if (!REG_P (XEXP (src, 1))
+	  && !MEM_P (XEXP (src, 1))
+	  && !CONST_INT_P (XEXP (src, 1)))
+	return false;
       break;
 
     case REG:
@@ -2832,11 +2845,6 @@ dimode_scalar_to_vector_candidate_p (rtx_insn *insn)
 	  || !REG_P (XEXP (XEXP (src, 0), 0))))
       return false;
 
-  if (!REG_P (XEXP (src, 1))
-      && !MEM_P (XEXP (src, 1))
-      && !CONST_INT_P (XEXP (src, 1)))
-      return false;
-
   if ((GET_MODE (XEXP (src, 0)) != DImode
        && !CONST_INT_P (XEXP (src, 0)))
       || (GET_MODE (XEXP (src, 1)) != DImode
@@ -3387,6 +3395,13 @@ dimode_scalar_chain::compute_convert_gain ()
 	gain += 2 * ix86_cost->int_store[2] - ix86_cost->sse_store[1];
       else if (MEM_P (src) && REG_P (dst))
 	gain += 2 * ix86_cost->int_load[2] - ix86_cost->sse_load[1];
+      else if (GET_CODE (src) == ASHIFT
+	       || GET_CODE (src) == LSHIFTRT)
+	{
+	  gain += ix86_cost->add;
+    	  if (CONST_INT_P (XEXP (src, 0)))
+	    gain -= vector_const_cost (XEXP (src, 0));
+	}
       else if (GET_CODE (src) == PLUS
 	       || GET_CODE (src) == MINUS
 	       || GET_CODE (src) == IOR
@@ -3738,6 +3753,12 @@ dimode_scalar_chain::convert_insn (rtx_insn *insn)
 
   switch (GET_CODE (src))
     {
+    case ASHIFT:
+    case LSHIFTRT:
+      convert_op (&XEXP (src, 0), insn);
+      PUT_MODE (src, V2DImode);
+      break;
+
     case PLUS:
     case MINUS:
     case IOR:

gcc/testsuite/ChangeLog

+2016-11-08  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/70799
+	* gcc.target/i386/pr70799-2.c: New test.
+
 2016-11-08  Janus Weil  <janus@gcc.gnu.org>
 
 	PR fortran/77596
@@ -48,7 +53,7 @@
 	* gcc.dg/store_merging_1.c: Require store_merge.
 	* gcc.dg/store_merging_2.c: Likewise.
 	* gcc.dg/store_merging_4.c: Likewise.
-	* gcc.dg/store_merging_5.c: Likewise. 
+	* gcc.dg/store_merging_5.c: Likewise.
 	* gcc.dg/store_merging_6.c: Likewise.
 	* gcc.dg/store_merging_7.c: Likewise.
 	* gcc.dg/store_merging_8.c: Likewise.
@@ -532,8 +537,8 @@
 	* gcc.dg/divmod-7.c: Likewise.
 
 2016-10-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
-            Jakub Jelinek  <jakub@redhat.com>
-            Andrew Pinski  <pinskia@gmail.com>
+	    Jakub Jelinek  <jakub@redhat.com>
+	    Andrew Pinski  <pinskia@gmail.com>
 
 	PR middle-end/22141
 	PR rtl-optimization/23684

gcc/testsuite/gcc.target/i386/pr70799-2.c

+/* PR target/pr70799 */
+/* { dg-do compile { target { ia32 } } } */
+/* { dg-options "-O2 -march=slm -mno-stackrealign" } */
+/* { dg-final { scan-assembler "psllq" } } */
+/* { dg-final { scan-assembler "psrlq" } } */
+
+unsigned long long a, b;
+
+void test1 (void)
+{
+  a = b << 21;
+}
+
+void test2 (void)
+{
+  a = b >> 21;
+}