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riscv-gcc-1
Commit 900a35c8 by Kazuhiro Inaoka Committed by Nick Clifton
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(call26_operand): Allow in PIC mode. 

From-SVN: r75589
parent df68f43b
Showing with 2 additions and 1 deletions
gcc/ChangeLog
2004-01-09 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 2004-01-09 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
* config/m32r/m32r.h (TARGET_CPU_CPP_BUILTINS): Add __m32r__. * config/m32r/m32r.h (TARGET_CPU_CPP_BUILTINS): Add __m32r__.
* config/m32r/m32r.c (call26_operand): Allow in PIC mode.
2004-01-09 Kazu Hirata <kazu@cs.umass.edu> 2004-01-09 Kazu Hirata <kazu@cs.umass.edu>
......
gcc/config/m32r/m32r.c
...@@ -590,7 +590,7 @@ int ...@@ -590,7 +590,7 @@ int
call26_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) call26_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
{ {
if (flag_pic) if (flag_pic)
return 0; return 1;
if (GET_CODE (op) == SYMBOL_REF) if (GET_CODE (op) == SYMBOL_REF)
return SYMBOL_REF_MODEL (op) != M32R_MODEL_LARGE; return SYMBOL_REF_MODEL (op) != M32R_MODEL_LARGE;
......
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