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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
8fc9a7ba
Commit
8fc9a7ba
authored
22 years ago
by
Kazu Hirata
Committed by
Kazu Hirata
22 years ago
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* config/h8300/h8300.md (a peephole2): Tighten the condition.
From-SVN: r65174
parent
496e1c4b
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gcc/ChangeLog
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gcc/config/h8300/h8300.md
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gcc/ChangeLog
View file @
8fc9a7ba
2003-04-02 Kazu Hirata <kazu@cs.umass.edu>
* config/h8300/h8300.md (a peephole2): Tighten the condition.
2003-04-02 Richard Henderson <rth@redhat.com>
* longlong.h (umul_ppmm) [alpha]: Use __builtin_alpha_umulh.
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gcc/config/h8300/h8300.md
View file @
8fc9a7ba
...
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@@ -4308,7 +4308,16 @@
gen_rtx_EQ (VOIDmode, cc0_rtx, const0_rtx));
operands
[
5
]
= GEN_INT (exact_log2 (INTVAL (operands
[
1
]
) + 1));")
;; Transform A <= 1 to (A & 0xfffffffe) == 0.
;; Transform
;;
;; cmp.l #15,er0
;; bhi .L1
;;
;; into
;;
;; and #240,r0l
;; mov.l er0,er0
;; bne .L1
(define_peephole2
[
(set (cc0)
...
...
@@ -4321,8 +4330,7 @@
(pc)))]
"(TARGET_H8300H || TARGET_H8300S)
&& peep2_reg_dead_p (1, operands
[
0
]
)
&& (INTVAL (operands
[
1
]
) == 1
|| INTVAL (operands
[
1
]
) == 3
&& ((TARGET_H8300H && INTVAL (operands
[
1
]
) == 3)
|| INTVAL (operands
[
1
]
) == 7
|| INTVAL (operands
[
1
]
) == 15
|| INTVAL (operands
[
1
]
) == 31
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