Commit 8fc53a5f by Eric Botcazou

predicates.md (ia64_cbranch_operator): Accept unordered comparison operators…

predicates.md (ia64_cbranch_operator): Accept unordered comparison operators when -fno-trapping-math is in effect.

	* config/ia64/predicates.md (ia64_cbranch_operator): Accept unordered
	comparison operators when -fno-trapping-math is in effect.
	* config/ia64/ia64.c (ia64_expand_compare): Add support for unordered
	comparison operators in TFmode and assert that unsupported operators
	cannot reach here.
	(ia64_print_operand): Likewise.

From-SVN: r202814
parent 0ca6c49f
2013-09-20 Jan Hubicka <jh@suse.cz> 2013-09-21 Eric Botcazou <ebotcazou@adacore.com>
* config/ia64/predicates.md (ia64_cbranch_operator): Accept unordered
comparison operators when -fno-trapping-math is in effect.
* config/ia64/ia64.c (ia64_expand_compare): Add support for unordered
comparison operators in TFmode and assert that unsupported operators
cannot reach here.
(ia64_print_operand): Likewise.
2013-09-21 Jan Hubicka <jh@suse.cz>
* x86-tune.def (partial_reg_stall): Disable for CoreI7 and newer. * x86-tune.def (partial_reg_stall): Disable for CoreI7 and newer.
(sse_typeless_stores): Enable for core (sse_typeless_stores): Enable for core
......
...@@ -1754,7 +1754,7 @@ ia64_expand_compare (rtx *expr, rtx *op0, rtx *op1) ...@@ -1754,7 +1754,7 @@ ia64_expand_compare (rtx *expr, rtx *op0, rtx *op1)
else if (TARGET_HPUX && GET_MODE (*op0) == TFmode) else if (TARGET_HPUX && GET_MODE (*op0) == TFmode)
{ {
enum qfcmp_magic { enum qfcmp_magic {
QCMP_INV = 1, /* Raise FP_INVALID on SNaN as a side effect. */ QCMP_INV = 1, /* Raise FP_INVALID on NaNs as a side effect. */
QCMP_UNORD = 2, QCMP_UNORD = 2,
QCMP_EQ = 4, QCMP_EQ = 4,
QCMP_LT = 8, QCMP_LT = 8,
...@@ -1768,21 +1768,27 @@ ia64_expand_compare (rtx *expr, rtx *op0, rtx *op1) ...@@ -1768,21 +1768,27 @@ ia64_expand_compare (rtx *expr, rtx *op0, rtx *op1)
switch (code) switch (code)
{ {
/* 1 = equal, 0 = not equal. Equality operators do /* 1 = equal, 0 = not equal. Equality operators do
not raise FP_INVALID when given an SNaN operand. */ not raise FP_INVALID when given a NaN operand. */
case EQ: magic = QCMP_EQ; ncode = NE; break; case EQ: magic = QCMP_EQ; ncode = NE; break;
case NE: magic = QCMP_EQ; ncode = EQ; break; case NE: magic = QCMP_EQ; ncode = EQ; break;
/* isunordered() from C99. */ /* isunordered() from C99. */
case UNORDERED: magic = QCMP_UNORD; ncode = NE; break; case UNORDERED: magic = QCMP_UNORD; ncode = NE; break;
case ORDERED: magic = QCMP_UNORD; ncode = EQ; break; case ORDERED: magic = QCMP_UNORD; ncode = EQ; break;
/* Relational operators raise FP_INVALID when given /* Relational operators raise FP_INVALID when given
an SNaN operand. */ a NaN operand. */
case LT: magic = QCMP_LT |QCMP_INV; ncode = NE; break; case LT: magic = QCMP_LT |QCMP_INV; ncode = NE; break;
case LE: magic = QCMP_LT|QCMP_EQ|QCMP_INV; ncode = NE; break; case LE: magic = QCMP_LT|QCMP_EQ|QCMP_INV; ncode = NE; break;
case GT: magic = QCMP_GT |QCMP_INV; ncode = NE; break; case GT: magic = QCMP_GT |QCMP_INV; ncode = NE; break;
case GE: magic = QCMP_GT|QCMP_EQ|QCMP_INV; ncode = NE; break; case GE: magic = QCMP_GT|QCMP_EQ|QCMP_INV; ncode = NE; break;
/* FUTURE: Implement UNEQ, UNLT, UNLE, UNGT, UNGE, LTGT. /* Unordered relational operators do not raise FP_INVALID
Expanders for buneq etc. weuld have to be added to ia64.md when given a NaN operand. */
for this to be useful. */ case UNLT: magic = QCMP_LT |QCMP_UNORD; ncode = NE; break;
case UNLE: magic = QCMP_LT|QCMP_EQ|QCMP_UNORD; ncode = NE; break;
case UNGT: magic = QCMP_GT |QCMP_UNORD; ncode = NE; break;
case UNGE: magic = QCMP_GT|QCMP_EQ|QCMP_UNORD; ncode = NE; break;
/* Not supported. */
case UNEQ:
case LTGT:
default: gcc_unreachable (); default: gcc_unreachable ();
} }
...@@ -5277,6 +5283,9 @@ ia64_print_operand (FILE * file, rtx x, int code) ...@@ -5277,6 +5283,9 @@ ia64_print_operand (FILE * file, rtx x, int code)
case UNGE: case UNGE:
str = "nlt"; str = "nlt";
break; break;
case UNEQ:
case LTGT:
gcc_unreachable ();
default: default:
str = GET_RTX_NAME (GET_CODE (x)); str = GET_RTX_NAME (GET_CODE (x));
break; break;
......
...@@ -568,9 +568,15 @@ ...@@ -568,9 +568,15 @@
(match_test "op == CONST0_RTX (GET_MODE (op))")))) (match_test "op == CONST0_RTX (GET_MODE (op))"))))
;; Return 1 if OP is a valid comparison operator for "cbranch" instructions. ;; Return 1 if OP is a valid comparison operator for "cbranch" instructions.
;; If we're assuming that FP operations cannot generate user-visible traps,
;; then we can use the FP unordered-signaling instructions to implement the
;; FP unordered-quiet comparison predicates.
(define_predicate "ia64_cbranch_operator" (define_predicate "ia64_cbranch_operator"
(ior (match_operand 0 "ordered_comparison_operator") (if_then_else (match_test "flag_trapping_math")
(match_code "ordered,unordered"))) (ior (match_operand 0 "ordered_comparison_operator")
(match_code "ordered,unordered"))
(and (match_operand 0 "comparison_operator")
(not (match_code "uneq,ltgt")))))
;; True if this is a comparison operator, which accepts a normal 8-bit ;; True if this is a comparison operator, which accepts a normal 8-bit
;; signed immediate operand. ;; signed immediate operand.
......
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