Commit 8f6a773b by Uros Bizjak Committed by Uros Bizjak

i386.md (*lea<mode>_general_1): Rename from *lea_general_1.

	* config/i386/i386.md (*lea<mode>_general_1): Rename from
	*lea_general_1.  Use explicit SWI12 mode interator.
	(*lea<mode>_general_2): Rename from *lea_general_2.
	Use explicit SWI12 mode interator.
	(*lea<mode>_general_3): Rename from *lea_general_3.
	Use explicit SWI12 mode interator.
	(*lea<SWI12:mode>_general_4): Split from *lea_general_4.
	Use explicit SWI12 mode interator.
	(*lea<SWI48:mode>_general_4): Split from *lea_general_4.
	Use explicit SWI48 mode interator.

From-SVN: r235286
parent 7ccc9536
2016-04-20 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (*lea<mode>_general_1): Rename from
*lea_general_1. Use explicit SWI12 mode interator.
(*lea<mode>_general_2): Rename from *lea_general_2.
Use explicit SWI12 mode interator.
(*lea<mode>_general_3): Rename from *lea_general_3.
Use explicit SWI12 mode interator.
(*lea<SWI12:mode>_general_4): Split from *lea_general_4.
Use explicit SWI12 mode interator.
(*lea<SWI48:mode>_general_4): Split from *lea_general_4.
Use explicit SWI48 mode interator.
2016-04-20 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/i386.c (ix86_avx256_split_vector_move_misalign):
......
......@@ -6206,144 +6206,119 @@
;; The lea patterns for modes less than 32 bits need to be matched by
;; several insns converted to real lea by splitters.
(define_insn_and_split "*lea_general_1"
[(set (match_operand 0 "register_operand" "=r")
(plus (plus (match_operand 1 "index_register_operand" "l")
(match_operand 2 "register_operand" "r"))
(match_operand 3 "immediate_operand" "i")))]
"(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode)
&& (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
&& GET_MODE (operands[0]) == GET_MODE (operands[1])
&& GET_MODE (operands[0]) == GET_MODE (operands[2])
&& (GET_MODE (operands[0]) == GET_MODE (operands[3])
|| GET_MODE (operands[3]) == VOIDmode)"
(define_insn_and_split "*lea<mode>_general_1"
[(set (match_operand:SWI12 0 "register_operand" "=r")
(plus:SWI12
(plus:SWI12 (match_operand:SWI12 1 "index_register_operand" "l")
(match_operand:SWI12 2 "register_operand" "r"))
(match_operand:SWI12 3 "immediate_operand" "i")))]
"!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)"
"#"
"&& reload_completed"
[(const_int 0)]
[(set (match_dup 0)
(plus:SI
(plus:SI (match_dup 1) (match_dup 2))
(match_dup 3)))]
{
machine_mode mode = SImode;
rtx pat;
operands[0] = gen_lowpart (mode, operands[0]);
operands[1] = gen_lowpart (mode, operands[1]);
operands[2] = gen_lowpart (mode, operands[2]);
operands[3] = gen_lowpart (mode, operands[3]);
pat = gen_rtx_PLUS (mode, gen_rtx_PLUS (mode, operands[1], operands[2]),
operands[3]);
emit_insn (gen_rtx_SET (operands[0], pat));
DONE;
operands[0] = gen_lowpart (SImode, operands[0]);
operands[1] = gen_lowpart (SImode, operands[1]);
operands[2] = gen_lowpart (SImode, operands[2]);
operands[3] = gen_lowpart (SImode, operands[3]);
}
[(set_attr "type" "lea")
(set_attr "mode" "SI")])
(define_insn_and_split "*lea_general_2"
[(set (match_operand 0 "register_operand" "=r")
(plus (mult (match_operand 1 "index_register_operand" "l")
(match_operand 2 "const248_operand" "n"))
(match_operand 3 "nonmemory_operand" "ri")))]
"(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode)
&& (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
&& GET_MODE (operands[0]) == GET_MODE (operands[1])
&& (GET_MODE (operands[0]) == GET_MODE (operands[3])
|| GET_MODE (operands[3]) == VOIDmode)"
(define_insn_and_split "*lea<mode>_general_2"
[(set (match_operand:SWI12 0 "register_operand" "=r")
(plus:SWI12
(mult:SWI12 (match_operand:SWI12 1 "index_register_operand" "l")
(match_operand:SWI12 2 "const248_operand" "n"))
(match_operand:SWI12 3 "nonmemory_operand" "ri")))]
"!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)"
"#"
"&& reload_completed"
[(const_int 0)]
[(set (match_dup 0)
(plus:SI
(mult:SI (match_dup 1) (match_dup 2))
(match_dup 3)))]
{
machine_mode mode = SImode;
rtx pat;
operands[0] = gen_lowpart (mode, operands[0]);
operands[1] = gen_lowpart (mode, operands[1]);
operands[3] = gen_lowpart (mode, operands[3]);
pat = gen_rtx_PLUS (mode, gen_rtx_MULT (mode, operands[1], operands[2]),
operands[3]);
emit_insn (gen_rtx_SET (operands[0], pat));
DONE;
operands[0] = gen_lowpart (SImode, operands[0]);
operands[1] = gen_lowpart (SImode, operands[1]);
operands[3] = gen_lowpart (SImode, operands[3]);
}
[(set_attr "type" "lea")
(set_attr "mode" "SI")])
(define_insn_and_split "*lea_general_3"
[(set (match_operand 0 "register_operand" "=r")
(plus (plus (mult (match_operand 1 "index_register_operand" "l")
(match_operand 2 "const248_operand" "n"))
(match_operand 3 "register_operand" "r"))
(match_operand 4 "immediate_operand" "i")))]
"(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode)
&& (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
&& GET_MODE (operands[0]) == GET_MODE (operands[1])
&& GET_MODE (operands[0]) == GET_MODE (operands[3])"
(define_insn_and_split "*lea<mode>_general_3"
[(set (match_operand:SWI12 0 "register_operand" "=r")
(plus:SWI12
(plus:SWI12
(mult:SWI12 (match_operand:SWI12 1 "index_register_operand" "l")
(match_operand:SWI12 2 "const248_operand" "n"))
(match_operand:SWI12 3 "register_operand" "r"))
(match_operand:SWI12 4 "immediate_operand" "i")))]
"!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)"
"#"
"&& reload_completed"
[(const_int 0)]
[(set (match_dup 0)
(plus:SI
(plus:SI
(mult:SI (match_dup 1) (match_dup 2))
(match_dup 3))
(match_dup 4)))]
{
machine_mode mode = SImode;
rtx pat;
operands[0] = gen_lowpart (mode, operands[0]);
operands[1] = gen_lowpart (mode, operands[1]);
operands[3] = gen_lowpart (mode, operands[3]);
operands[4] = gen_lowpart (mode, operands[4]);
pat = gen_rtx_PLUS (mode,
gen_rtx_PLUS (mode,
gen_rtx_MULT (mode, operands[1],
operands[2]),
operands[3]),
operands[4]);
emit_insn (gen_rtx_SET (operands[0], pat));
DONE;
operands[0] = gen_lowpart (SImode, operands[0]);
operands[1] = gen_lowpart (SImode, operands[1]);
operands[3] = gen_lowpart (SImode, operands[3]);
operands[4] = gen_lowpart (SImode, operands[4]);
}
[(set_attr "type" "lea")
(set_attr "mode" "SI")])
(define_insn_and_split "*lea_general_4"
[(set (match_operand 0 "register_operand" "=r")
(any_or (ashift
(match_operand 1 "index_register_operand" "l")
(match_operand 2 "const_int_operand" "n"))
(match_operand 3 "const_int_operand" "n")))]
"(((GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode)
&& (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)))
|| GET_MODE (operands[0]) == SImode
|| (TARGET_64BIT && GET_MODE (operands[0]) == DImode))
&& GET_MODE (operands[0]) == GET_MODE (operands[1])
&& ((unsigned HOST_WIDE_INT) INTVAL (operands[2])) - 1 < 3
(define_insn_and_split "*lea<mode>_general_4"
[(set (match_operand:SWI12 0 "register_operand" "=r")
(any_or:SWI12
(ashift:SWI12
(match_operand:SWI12 1 "index_register_operand" "l")
(match_operand:SWI12 2 "const_int_operand" "n"))
(match_operand:SWI12 3 "const_int_operand" "n")))]
"(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
&& (unsigned HOST_WIDE_INT) INTVAL (operands[2]) <= 3
&& ((unsigned HOST_WIDE_INT) INTVAL (operands[3])
< (HOST_WIDE_INT_1U << INTVAL (operands[2])))"
"#"
"&& reload_completed"
[(const_int 0)]
[(set (match_dup 0)
(plus:SI
(mult:SI (match_dup 1) (match_dup 2))
(match_dup 3)))]
{
machine_mode mode = GET_MODE (operands[0]);
rtx pat;
if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (SImode))
{
mode = SImode;
operands[0] = gen_lowpart (mode, operands[0]);
operands[1] = gen_lowpart (mode, operands[1]);
}
operands[0] = gen_lowpart (SImode, operands[0]);
operands[1] = gen_lowpart (SImode, operands[1]);
operands[2] = GEN_INT (1 << INTVAL (operands[2]));
pat = plus_constant (mode, gen_rtx_MULT (mode, operands[1], operands[2]),
INTVAL (operands[3]));
emit_insn (gen_rtx_SET (operands[0], pat));
DONE;
}
[(set_attr "type" "lea")
(set (attr "mode")
(if_then_else (match_operand:DI 0)
(const_string "DI")
(const_string "SI")))])
(set_attr "mode" "SI")])
(define_insn_and_split "*lea<mode>_general_4"
[(set (match_operand:SWI48 0 "register_operand" "=r")
(any_or:SWI48
(ashift:SWI48
(match_operand:SWI48 1 "index_register_operand" "l")
(match_operand:SWI48 2 "const_int_operand" "n"))
(match_operand:SWI48 3 "const_int_operand" "n")))]
"(unsigned HOST_WIDE_INT) INTVAL (operands[2]) <= 3
&& ((unsigned HOST_WIDE_INT) INTVAL (operands[3])
< (HOST_WIDE_INT_1U << INTVAL (operands[2])))"
"#"
"&& reload_completed"
[(set (match_dup 0)
(plus:SWI48
(mult:SWI48 (match_dup 1) (match_dup 2))
(match_dup 3)))]
"operands[2] = GEN_INT (1 << INTVAL (operands[2]));"
[(set_attr "type" "lea")
(set_attr "mode" "<MODE>")])
;; Subtract instructions
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment