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riscv-gcc-1
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lvzhengyang
riscv-gcc-1
Commits
8edbbbc3
Commit
8edbbbc3
authored
May 11, 2012
by
Mingjie Xing
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Fix misspelled macro in t-vxworks.
From-SVN: r187392
parent
7eabddf0
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gcc/config/mips/t-vxworks
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8edbbbc3
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@@ -32,4 +32,4 @@ MULTILIB_EXCEPTIONS = mips3* mabi=o64 fPIC \
...
@@ -32,4 +32,4 @@ MULTILIB_EXCEPTIONS = mips3* mabi=o64 fPIC \
$(addprefix mabi=o64/, EL* msoft-float* mrtp* fPIC*) \
$(addprefix mabi=o64/, EL* msoft-float* mrtp* fPIC*) \
$(addsuffix /fPIC, *mabi=o64 *mips3 *EL *msoft-float)
$(addsuffix /fPIC, *mabi=o64 *mips3 *EL *msoft-float)
MU
TL
ILIB_EXTRA_OPTS = -G 0 -mno-branch-likely
MU
LT
ILIB_EXTRA_OPTS = -G 0 -mno-branch-likely
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