Commit 8e8238f1 by David Edelsohn Committed by David Edelsohn

rs6000.md (define_attr "type"): Add insert_word.

        * config/rs6000/rs6000.md (define_attr "type"): Add insert_word.
        (insvsi*): Add insert_word attribute.
        * config/rs6000/rs6000.c (rs6000_variable_issue): Add TYPE_INSERT_WORD.
        * config/rs6000/{40x.md,603.md,6xx.md,7450.md,7xx.md,mpc.md,
        power4.md,rios1.md,rios2.md,rs64.md}: Add insert_word.

Co-Authored-By: Ayal Zaks <gcchaifa@us.ibm.com>

From-SVN: r67668
parent fcc36507
2003-06-09 David Edelsohn <edelsohn@gnu.org>
Ayal Zaks <gcchaifa@us.ibm.com>
* config/rs6000/rs6000.md (define_attr "type"): Add insert_word.
(insvsi*): Add insert_word attribute.
* config/rs6000/rs6000.c (rs6000_variable_issue): Add TYPE_INSERT_WORD.
* config/rs6000/{40x.md,603.md,6xx.md,7450.md,7xx.md,mpc.md,
power4.md,rios1.md,rios2.md,rs64.md}: Add insert_word.
2003-06-09 Kazu Hirata <kazu@cs.umass.edu> 2003-06-09 Kazu Hirata <kazu@cs.umass.edu>
* fold-const.c (fold): Fix a comment typo. * fold-const.c (fold): Fix a comment typo.
......
...@@ -36,7 +36,7 @@ ...@@ -36,7 +36,7 @@
"iu_40x") "iu_40x")
(define_insn_reservation "ppc403-integer" 1 (define_insn_reservation "ppc403-integer" 1
(and (eq_attr "type" "integer") (and (eq_attr "type" "integer,insert_word")
(eq_attr "cpu" "ppc403,ppc405")) (eq_attr "cpu" "ppc403,ppc405"))
"iu_40x") "iu_40x")
......
...@@ -54,7 +54,7 @@ ...@@ -54,7 +54,7 @@
"ppc440_issue,ppc440_l_pipe") "ppc440_issue,ppc440_l_pipe")
(define_insn_reservation "ppc440-integer" 1 (define_insn_reservation "ppc440-integer" 1
(and (eq_attr "type" "integer") (and (eq_attr "type" "integer,insert_word")
(eq_attr "cpu" "ppc440")) (eq_attr "cpu" "ppc440"))
"ppc440_issue,ppc440_i_pipe|ppc440_j_pipe") "ppc440_issue,ppc440_i_pipe|ppc440_j_pipe")
......
...@@ -54,7 +54,7 @@ ...@@ -54,7 +54,7 @@
"lsu_603") "lsu_603")
(define_insn_reservation "ppc603-integer" 1 (define_insn_reservation "ppc603-integer" 1
(and (eq_attr "type" "integer") (and (eq_attr "type" "integer,insert_word")
(eq_attr "cpu" "ppc603")) (eq_attr "cpu" "ppc603"))
"iu_603") "iu_603")
......
...@@ -64,7 +64,7 @@ ...@@ -64,7 +64,7 @@
"lsu_6xx") "lsu_6xx")
(define_insn_reservation "ppc604-integer" 1 (define_insn_reservation "ppc604-integer" 1
(and (eq_attr "type" "integer") (and (eq_attr "type" "integer,insert_word")
(eq_attr "cpu" "ppc604,ppc604e,ppc620,ppc630")) (eq_attr "cpu" "ppc604,ppc604e,ppc620,ppc630"))
"iu1_6xx|iu2_6xx") "iu1_6xx|iu2_6xx")
......
...@@ -64,7 +64,7 @@ ...@@ -64,7 +64,7 @@
"ppc7450_du,lsu_7450*3") "ppc7450_du,lsu_7450*3")
(define_insn_reservation "ppc7450-integer" 1 (define_insn_reservation "ppc7450-integer" 1
(and (eq_attr "type" "integer") (and (eq_attr "type" "integer,insert_word")
(eq_attr "cpu" "ppc7450")) (eq_attr "cpu" "ppc7450"))
"ppc7450_du,(iu1_7450|iu2_7450|iu3_7450)") "ppc7450_du,(iu1_7450|iu2_7450|iu3_7450)")
......
...@@ -59,7 +59,7 @@ ...@@ -59,7 +59,7 @@
"ppc750_du,lsu_7xx") "ppc750_du,lsu_7xx")
(define_insn_reservation "ppc750-integer" 1 (define_insn_reservation "ppc750-integer" 1
(and (eq_attr "type" "integer") (and (eq_attr "type" "integer,insert_word")
(eq_attr "cpu" "ppc750,ppc7400")) (eq_attr "cpu" "ppc750,ppc7400"))
"ppc750_du,(iu1_7xx|iu2_7xx)") "ppc750_du,(iu1_7xx|iu2_7xx)")
......
...@@ -85,7 +85,7 @@ ...@@ -85,7 +85,7 @@
;; Simple SU insns ;; Simple SU insns
(define_insn_reservation "ppc8540_su" 1 (define_insn_reservation "ppc8540_su" 1
(and (eq_attr "type" "integer,cmp,compare,delayed_compare,fast_compare") (and (eq_attr "type" "integer,insert_word,cmp,compare,delayed_compare,fast_compare")
(eq_attr "cpu" "ppc8540")) (eq_attr "cpu" "ppc8540"))
"ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire") "ppc8540_decode,ppc8540_issue+ppc8540_su_stage0+ppc8540_retire")
......
...@@ -42,7 +42,7 @@ ...@@ -42,7 +42,7 @@
"lsu_mpc") "lsu_mpc")
(define_insn_reservation "mpccore-integer" 1 (define_insn_reservation "mpccore-integer" 1
(and (eq_attr "type" "integer") (and (eq_attr "type" "integer,insert_word")
(eq_attr "cpu" "mpccore")) (eq_attr "cpu" "mpccore"))
"iu_mpc") "iu_mpc")
......
...@@ -183,6 +183,13 @@ ...@@ -183,6 +183,13 @@
(eq_attr "cpu" "power4")) (eq_attr "cpu" "power4"))
"iq_power4") "iq_power4")
(define_insn_reservation "power4-insert" 4
(and (eq_attr "type" "insert_word")
(eq_attr "cpu" "power4"))
"(du1_power4+du2_power4,iu1_power4,nothing,iu2_power4)\
|(du2_power4+du3_power4,iu2_power4,nothing,iu2_power4)\
|(du3_power4+du4_power4,iu2_power4,nothing,iu1_power4)")
(define_insn_reservation "power4-cmp" 3 (define_insn_reservation "power4-cmp" 3
(and (eq_attr "type" "cmp,fast_compare") (and (eq_attr "type" "cmp,fast_compare")
(eq_attr "cpu" "power4")) (eq_attr "cpu" "power4"))
......
...@@ -51,7 +51,7 @@ ...@@ -51,7 +51,7 @@
"iu_rios1+fpu_rios1") "iu_rios1+fpu_rios1")
(define_insn_reservation "rios1-integer" 1 (define_insn_reservation "rios1-integer" 1
(and (eq_attr "type" "integer") (and (eq_attr "type" "integer,insert_word")
(eq_attr "cpu" "rios1,ppc601")) (eq_attr "cpu" "rios1,ppc601"))
"iu_rios1") "iu_rios1")
......
...@@ -39,7 +39,7 @@ ...@@ -39,7 +39,7 @@
"iu1_rios2|iu2_rios2") "iu1_rios2|iu2_rios2")
(define_insn_reservation "rios2-integer" 1 (define_insn_reservation "rios2-integer" 1
(and (eq_attr "type" "integer") (and (eq_attr "type" "integer,insert_word")
(eq_attr "cpu" "rios2")) (eq_attr "cpu" "rios2"))
"iu1_rios2|iu2_rios2") "iu1_rios2|iu2_rios2")
......
...@@ -13055,7 +13055,8 @@ rs6000_variable_issue (stream, verbose, insn, more) ...@@ -13055,7 +13055,8 @@ rs6000_variable_issue (stream, verbose, insn, more)
|| type == TYPE_LOAD_EXT || type == TYPE_DELAYED_CR || type == TYPE_LOAD_EXT || type == TYPE_DELAYED_CR
|| type == TYPE_COMPARE || type == TYPE_DELAYED_COMPARE || type == TYPE_COMPARE || type == TYPE_DELAYED_COMPARE
|| type == TYPE_IMUL_COMPARE || type == TYPE_LMUL_COMPARE || type == TYPE_IMUL_COMPARE || type == TYPE_LMUL_COMPARE
|| type == TYPE_IDIV || type == TYPE_LDIV) || type == TYPE_IDIV || type == TYPE_LDIV
|| type == TYPE_INSERT_WORD)
return more > 2 ? more - 2 : 0; return more > 2 ? more - 2 : 0;
} }
......
...@@ -62,7 +62,7 @@ ...@@ -62,7 +62,7 @@
;; Define an insn type attribute. This is used in function unit delay ;; Define an insn type attribute. This is used in function unit delay
;; computations. ;; computations.
(define_attr "type" "integer,load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,store,store_ux,store_u,fpload,fpload_ux,fpload_u,fpstore,fpstore_ux,fpstore_u,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,branch,cmp,fast_compare,compare,delayed_compare,imul_compare,lmul_compare,fpcompare,cr_logical,delayed_cr,mfcr,mtcr,mfjmpr,mtjmpr,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,brinc,vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,vecfloat,vecfdiv" (define_attr "type" "integer,load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,store,store_ux,store_u,fpload,fpload_ux,fpload_u,fpstore,fpstore_ux,fpstore_u,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,insert_word,branch,cmp,fast_compare,compare,delayed_compare,imul_compare,lmul_compare,fpcompare,cr_logical,delayed_cr,mfcr,mtcr,mfjmpr,mtjmpr,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,brinc,vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,vecfloat,vecfdiv"
(const_string "integer")) (const_string "integer"))
;; Length (in bytes). ;; Length (in bytes).
...@@ -2951,7 +2951,8 @@ ...@@ -2951,7 +2951,8 @@
operands[4] = GEN_INT (32 - start - size); operands[4] = GEN_INT (32 - start - size);
operands[1] = GEN_INT (start + size - 1); operands[1] = GEN_INT (start + size - 1);
return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\"; return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\";
}") }"
[(set_attr "type" "insert_word")])
(define_insn "*insvsi_internal1" (define_insn "*insvsi_internal1"
[(set (zero_extract:SI (match_operand:SI 0 "gpc_reg_operand" "+r") [(set (zero_extract:SI (match_operand:SI 0 "gpc_reg_operand" "+r")
...@@ -2969,7 +2970,8 @@ ...@@ -2969,7 +2970,8 @@
operands[4] = GEN_INT (shift - start - size); operands[4] = GEN_INT (shift - start - size);
operands[1] = GEN_INT (start + size - 1); operands[1] = GEN_INT (start + size - 1);
return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\"; return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\";
}") }"
[(set_attr "type" "insert_word")])
(define_insn "*insvsi_internal2" (define_insn "*insvsi_internal2"
[(set (zero_extract:SI (match_operand:SI 0 "gpc_reg_operand" "+r") [(set (zero_extract:SI (match_operand:SI 0 "gpc_reg_operand" "+r")
...@@ -2987,7 +2989,8 @@ ...@@ -2987,7 +2989,8 @@
operands[4] = GEN_INT (32 - shift - start - size); operands[4] = GEN_INT (32 - shift - start - size);
operands[1] = GEN_INT (start + size - 1); operands[1] = GEN_INT (start + size - 1);
return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\"; return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\";
}") }"
[(set_attr "type" "insert_word")])
(define_insn "*insvsi_internal3" (define_insn "*insvsi_internal3"
[(set (zero_extract:SI (match_operand:SI 0 "gpc_reg_operand" "+r") [(set (zero_extract:SI (match_operand:SI 0 "gpc_reg_operand" "+r")
...@@ -3005,7 +3008,8 @@ ...@@ -3005,7 +3008,8 @@
operands[4] = GEN_INT (32 - shift - start - size); operands[4] = GEN_INT (32 - shift - start - size);
operands[1] = GEN_INT (start + size - 1); operands[1] = GEN_INT (start + size - 1);
return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\"; return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\";
}") }"
[(set_attr "type" "insert_word")])
(define_insn "*insvsi_internal4" (define_insn "*insvsi_internal4"
[(set (zero_extract:SI (match_operand:SI 0 "gpc_reg_operand" "+r") [(set (zero_extract:SI (match_operand:SI 0 "gpc_reg_operand" "+r")
...@@ -3026,7 +3030,8 @@ ...@@ -3026,7 +3030,8 @@
operands[5] = GEN_INT (extract_start + extract_size - insert_start - insert_size); operands[5] = GEN_INT (extract_start + extract_size - insert_start - insert_size);
operands[1] = GEN_INT (insert_start + insert_size - 1); operands[1] = GEN_INT (insert_start + insert_size - 1);
return \"{rlimi|rlwimi} %0,%3,%h5,%h2,%h1\"; return \"{rlimi|rlwimi} %0,%3,%h5,%h2,%h1\";
}") }"
[(set_attr "type" "insert_word")])
(define_insn "insvdi" (define_insn "insvdi"
[(set (zero_extract:DI (match_operand:DI 0 "gpc_reg_operand" "+r") [(set (zero_extract:DI (match_operand:DI 0 "gpc_reg_operand" "+r")
......
...@@ -42,7 +42,7 @@ ...@@ -42,7 +42,7 @@
"lsu_rs64") "lsu_rs64")
(define_insn_reservation "rs64a-integer" 1 (define_insn_reservation "rs64a-integer" 1
(and (eq_attr "type" "integer") (and (eq_attr "type" "integer,insert_word")
(eq_attr "cpu" "rs64a")) (eq_attr "cpu" "rs64a"))
"iu_rs64") "iu_rs64")
......
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