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riscv-gcc-1
Commit 8e509cf9 by Ulrich Weigand Committed by Ulrich Weigand
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linux.h (CC1_SPEC, [...]): Remove. 

	* config/s390/linux.h (CC1_SPEC, CC1PLUS_SPEC): Remove.
	* config/s390/s390.c (optimization_options): Disable -fcaller-saves.

	* config/s390/s390-protos.h (fp_operand): Remove.
	* config/s390/s390.c (fp_operand): Remove.
	* config/s390/s390.md ("movdi"): Replace fp_operand by FP_REG_P.
	("*movdi_lhi", "*movdi_lli", "*movdi_larl"): Likewise.
	("movsi", "*movsi_lhi", "*movsi_lli"): Likewise.
	(movdi_31, movdf_31 splitters): Likewise.

	* config/s390/s390.h (IEEE_FLOAT): Remove.
	(TARGET_FLOAT_FORMAT): Define in terms of TARGET_IEEE_FLOAT.
	(INT_REGNO_P): Rename to ...
	(GENERAL_REGNO_P): ... this.
	(FLOAT_REGNO_P): Rename to ...
	(FP_REGNO_P): ... this.
	(ADDR_REGNO_P): New macro.
	(GENERAL_REG_P, ADDR_REG_P, FP_REG_P, CC_REG_P): New macros.
	(REGNO_OK_FOR_DATA_P, REGNO_OK_FOR_FP_P): Remove.
	(DATA_REG_P, FP_REG_P, ADDRESS_REG_P): Likewise.
	(HARD_REGNO_NREGS): Adapt to macro renaming.
	(HARD_REGNO_MODE_OK): Likewise.

From-SVN: r58458
parent 3eb6b2b0
Showing with 61 additions and 87 deletions
gcc/ChangeLog
2002-10-23 Ulrich Weigand <uweigand@de.ibm.com>
* config/s390/linux.h (CC1_SPEC, CC1PLUS_SPEC): Remove.
* config/s390/s390.c (optimization_options): Disable -fcaller-saves.
* config/s390/s390-protos.h (fp_operand): Remove.
* config/s390/s390.c (fp_operand): Remove.
* config/s390/s390.md ("movdi"): Replace fp_operand by FP_REG_P.
("*movdi_lhi", "*movdi_lli", "*movdi_larl"): Likewise.
("movsi", "*movsi_lhi", "*movsi_lli"): Likewise.
(movdi_31, movdf_31 splitters): Likewise.
* config/s390/s390.h (IEEE_FLOAT): Remove.
(TARGET_FLOAT_FORMAT): Define in terms of TARGET_IEEE_FLOAT.
(INT_REGNO_P): Rename to ...
(GENERAL_REGNO_P): ... this.
(FLOAT_REGNO_P): Rename to ...
(FP_REGNO_P): ... this.
(ADDR_REGNO_P): New macro.
(GENERAL_REG_P, ADDR_REG_P, FP_REG_P, CC_REG_P): New macros.
(REGNO_OK_FOR_DATA_P, REGNO_OK_FOR_FP_P): Remove.
(DATA_REG_P, FP_REG_P, ADDRESS_REG_P): Likewise.
(HARD_REGNO_NREGS): Adapt to macro renaming.
(HARD_REGNO_MODE_OK): Likewise.
2002-10-23 David Edelsohn <edelsohn@gnu.org> 2002-10-23 David Edelsohn <edelsohn@gnu.org>
Geoff Keating <geoffk@apple.com> Geoff Keating <geoffk@apple.com>
......
gcc/config/s390/linux.h
...@@ -68,15 +68,6 @@ Boston, MA 02111-1307, USA. */ ...@@ -68,15 +68,6 @@ Boston, MA 02111-1307, USA. */
while (0) while (0)
/* Target specific compiler settings. */
/* ??? -fcaller-saves sometimes doesn't work. Fix this! */
#undef CC1_SPEC
#define CC1_SPEC "-fno-caller-saves"
#undef CC1PLUS_SPEC
#define CC1PLUS_SPEC "-fno-caller-saves"
/* Target specific assembler settings. */ /* Target specific assembler settings. */
#ifdef DEFAULT_TARGET_64BIT #ifdef DEFAULT_TARGET_64BIT
......
gcc/config/s390/s390-protos.h
...@@ -34,7 +34,6 @@ extern int q_constraint PARAMS ((rtx)); ...@@ -34,7 +34,6 @@ extern int q_constraint PARAMS ((rtx));
extern int const0_operand PARAMS ((rtx, enum machine_mode)); extern int const0_operand PARAMS ((rtx, enum machine_mode));
extern int consttable_operand PARAMS ((rtx, enum machine_mode)); extern int consttable_operand PARAMS ((rtx, enum machine_mode));
extern int larl_operand PARAMS ((rtx, enum machine_mode)); extern int larl_operand PARAMS ((rtx, enum machine_mode));
extern int fp_operand PARAMS ((rtx, enum machine_mode));
extern int s_operand PARAMS ((rtx, enum machine_mode)); extern int s_operand PARAMS ((rtx, enum machine_mode));
extern int s_imm_operand PARAMS ((rtx, enum machine_mode)); extern int s_imm_operand PARAMS ((rtx, enum machine_mode));
extern int bras_sym_operand PARAMS ((rtx, enum machine_mode)); extern int bras_sym_operand PARAMS ((rtx, enum machine_mode));
......
gcc/config/s390/s390.c
...@@ -814,6 +814,8 @@ optimization_options (level, size) ...@@ -814,6 +814,8 @@ optimization_options (level, size)
int level ATTRIBUTE_UNUSED; int level ATTRIBUTE_UNUSED;
int size ATTRIBUTE_UNUSED; int size ATTRIBUTE_UNUSED;
{ {
/* ??? There are apparently still problems with -fcaller-saves. */
flag_caller_saves = 0;
} }
void void
...@@ -934,24 +936,6 @@ larl_operand (op, mode) ...@@ -934,24 +936,6 @@ larl_operand (op, mode)
return 0; return 0;
} }
/* Return true if OP is a valid FP-Register.
OP is the current operation.
MODE is the current operation mode. */
int
fp_operand (op, mode)
register rtx op;
enum machine_mode mode;
{
register enum rtx_code code = GET_CODE (op);
if (! check_mode (op, &mode))
return 0;
if (code == REG && REGNO_OK_FOR_FP_P (REGNO (op)))
return 1;
else
return 0;
}
/* Helper routine to implement s_operand and s_imm_operand. /* Helper routine to implement s_operand and s_imm_operand.
OP is the current operation. OP is the current operation.
MODE is the current operation mode. MODE is the current operation mode.
......
gcc/config/s390/s390.h
...@@ -45,6 +45,10 @@ extern int target_flags; ...@@ -45,6 +45,10 @@ extern int target_flags;
#define TARGET_64BIT (target_flags & 16) #define TARGET_64BIT (target_flags & 16)
#define TARGET_MVCLE (target_flags & 32) #define TARGET_MVCLE (target_flags & 32)
/* ??? Once this actually works, it could be made a runtime option. */
#define TARGET_IBM_FLOAT 0
#define TARGET_IEEE_FLOAT 1
#ifdef DEFAULT_TARGET_64BIT #ifdef DEFAULT_TARGET_64BIT
#define TARGET_DEFAULT 0x13 #define TARGET_DEFAULT 0x13
#define TARGET_VERSION fprintf (stderr, " (zSeries)"); #define TARGET_VERSION fprintf (stderr, " (zSeries)");
...@@ -96,11 +100,6 @@ extern int target_flags; ...@@ -96,11 +100,6 @@ extern int target_flags;
} \ } \
while (0) while (0)
/* Defines for real.c. */
#define IEEE_FLOAT 1
#define TARGET_IBM_FLOAT 0
#define TARGET_IEEE_FLOAT 1
/* The amount of space used for outgoing arguments. */ /* The amount of space used for outgoing arguments. */
extern int current_function_outgoing_args_size; extern int current_function_outgoing_args_size;
...@@ -212,13 +211,8 @@ if (INTEGRAL_MODE_P (MODE) && \ ...@@ -212,13 +211,8 @@ if (INTEGRAL_MODE_P (MODE) && \
#define STRICT_ALIGNMENT 0 #define STRICT_ALIGNMENT 0
/* Define target floating point format. */ /* Define target floating point format. */
#define TARGET_FLOAT_FORMAT \
#undef TARGET_FLOAT_FORMAT (TARGET_IEEE_FLOAT? IEEE_FLOAT_FORMAT : IBM_FLOAT_FORMAT)
#ifdef IEEE_FLOAT
#define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
#else
#define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
#endif
/* Define if special allocation order desired. */ /* Define if special allocation order desired. */
...@@ -230,13 +224,15 @@ if (INTEGRAL_MODE_P (MODE) && \ ...@@ -230,13 +224,15 @@ if (INTEGRAL_MODE_P (MODE) && \
/* Standard register usage. */ /* Standard register usage. */
#define INT_REGNO_P(N) ( (int)(N) >= 0 && (N) < 16 ) #define GENERAL_REGNO_P(N) ((int)(N) >= 0 && (N) < 16)
#ifdef IEEE_FLOAT #define ADDR_REGNO_P(N) ((N) >= 1 && (N) < 16)
#define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 32 ) #define FP_REGNO_P(N) ((N) >= 16 && (N) < (TARGET_IEEE_FLOAT? 32 : 20))
#else #define CC_REGNO_P(N) ((N) == 33)
#define FLOAT_REGNO_P(N) ( (N) >= 16 && (N) < 20 )
#endif #define GENERAL_REG_P(X) (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
#define CC_REGNO_P(N) ( (N) == 33 ) #define ADDR_REG_P(X) (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
#define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
#define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X)))
/* Number of actual hardware registers. The hardware registers are /* Number of actual hardware registers. The hardware registers are
assigned numbers for the compiler from 0 to just below assigned numbers for the compiler from 0 to just below
...@@ -364,9 +360,9 @@ do \ ...@@ -364,9 +360,9 @@ do \
but can be less for certain modes in special long registers. */ but can be less for certain modes in special long registers. */
#define HARD_REGNO_NREGS(REGNO, MODE) \ #define HARD_REGNO_NREGS(REGNO, MODE) \
(FLOAT_REGNO_P(REGNO)? \ (FP_REGNO_P(REGNO)? \
(GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \ (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
INT_REGNO_P(REGNO)? \ GENERAL_REGNO_P(REGNO)? \
((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \ ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
1) 1)
...@@ -376,11 +372,11 @@ do \ ...@@ -376,11 +372,11 @@ do \
The floating point registers can hold DF, SF, DC and SC. */ The floating point registers can hold DF, SF, DC and SC. */
#define HARD_REGNO_MODE_OK(REGNO, MODE) \ #define HARD_REGNO_MODE_OK(REGNO, MODE) \
(FLOAT_REGNO_P(REGNO)? \ (FP_REGNO_P(REGNO)? \
((MODE) == SImode || (MODE) == DImode || \ ((MODE) == SImode || (MODE) == DImode || \
GET_MODE_CLASS(MODE) == MODE_FLOAT || \ GET_MODE_CLASS(MODE) == MODE_FLOAT || \
GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT) : \ GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT) : \
INT_REGNO_P(REGNO)? \ GENERAL_REGNO_P(REGNO)? \
(HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) : \ (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) : \
CC_REGNO_P(REGNO)? \ CC_REGNO_P(REGNO)? \
GET_MODE_CLASS (MODE) == MODE_CC : \ GET_MODE_CLASS (MODE) == MODE_CC : \
...@@ -877,27 +873,6 @@ CUMULATIVE_ARGS; ...@@ -877,27 +873,6 @@ CUMULATIVE_ARGS;
#define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO) #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
#define REGNO_OK_FOR_DATA_P(REGNO) \
((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
#define REGNO_OK_FOR_FP_P(REGNO) \
FLOAT_REGNO_P (REGNO)
/* Now macros that check whether X is a register and also,
strictly, whether it is in a specified class. */
/* 1 if X is a data register. */
#define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
/* 1 if X is an fp register. */
#define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
/* 1 if X is an address register. */
#define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
/* Maximum number of registers that can appear in a valid memory address. */ /* Maximum number of registers that can appear in a valid memory address. */
#define MAX_REGS_PER_ADDRESS 2 #define MAX_REGS_PER_ADDRESS 2
......
gcc/config/s390/s390.md
...@@ -862,7 +862,7 @@ ...@@ -862,7 +862,7 @@
if ((reload_in_progress || reload_completed) if ((reload_in_progress || reload_completed)
&& CONSTANT_P (operands[1]) && CONSTANT_P (operands[1])
&& (!legitimate_reload_constant_p (operands[1]) && (!legitimate_reload_constant_p (operands[1])
|| fp_operand (operands[0], VOIDmode))) || FP_REG_P (operands[0])))
operands[1] = force_const_mem (DImode, operands[1]); operands[1] = force_const_mem (DImode, operands[1]);
}") }")
...@@ -872,7 +872,7 @@ ...@@ -872,7 +872,7 @@
"TARGET_64BIT "TARGET_64BIT
&& GET_CODE (operands[1]) == CONST_INT && GET_CODE (operands[1]) == CONST_INT
&& CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'K') && CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'K')
&& !fp_operand (operands[0], VOIDmode)" && !FP_REG_P (operands[0])"
"lghi\\t%0,%h1" "lghi\\t%0,%h1"
[(set_attr "op_type" "RI") [(set_attr "op_type" "RI")
(set_attr "atype" "reg")]) (set_attr "atype" "reg")])
...@@ -881,7 +881,7 @@ ...@@ -881,7 +881,7 @@
[(set (match_operand:DI 0 "register_operand" "=d") [(set (match_operand:DI 0 "register_operand" "=d")
(match_operand:DI 1 "immediate_operand" "n"))] (match_operand:DI 1 "immediate_operand" "n"))]
"TARGET_64BIT && s390_single_hi (operands[1], DImode, 0) >= 0 "TARGET_64BIT && s390_single_hi (operands[1], DImode, 0) >= 0
&& !fp_operand (operands[0], VOIDmode)" && !FP_REG_P (operands[0])"
"* "*
{ {
int part = s390_single_hi (operands[1], DImode, 0); int part = s390_single_hi (operands[1], DImode, 0);
...@@ -903,7 +903,7 @@ ...@@ -903,7 +903,7 @@
[(set (match_operand:DI 0 "register_operand" "=d") [(set (match_operand:DI 0 "register_operand" "=d")
(match_operand:DI 1 "larl_operand" "X"))] (match_operand:DI 1 "larl_operand" "X"))]
"TARGET_64BIT "TARGET_64BIT
&& !fp_operand (operands[0], VOIDmode)" && !FP_REG_P (operands[0])"
"larl\\t%0,%1" "larl\\t%0,%1"
[(set_attr "op_type" "RIL") [(set_attr "op_type" "RIL")
(set_attr "atype" "reg") (set_attr "atype" "reg")
...@@ -944,8 +944,8 @@ ...@@ -944,8 +944,8 @@
[(set (match_operand:DI 0 "nonimmediate_operand" "") [(set (match_operand:DI 0 "nonimmediate_operand" "")
(match_operand:DI 1 "general_operand" ""))] (match_operand:DI 1 "general_operand" ""))]
"!TARGET_64BIT && reload_completed "!TARGET_64BIT && reload_completed
&& !fp_operand (operands[0], VOIDmode) && !FP_REG_P (operands[0])
&& !fp_operand (operands[1], VOIDmode) && !FP_REG_P (operands[1])
&& !s_operand (operands[0], VOIDmode) && !s_operand (operands[0], VOIDmode)
&& !s_operand (operands[1], VOIDmode) && !s_operand (operands[1], VOIDmode)
&& (register_operand (operands[0], VOIDmode) && (register_operand (operands[0], VOIDmode)
...@@ -981,8 +981,8 @@ ...@@ -981,8 +981,8 @@
[(set (match_operand:DI 0 "register_operand" "") [(set (match_operand:DI 0 "register_operand" "")
(match_operand:DI 1 "memory_operand" ""))] (match_operand:DI 1 "memory_operand" ""))]
"!TARGET_64BIT && reload_completed "!TARGET_64BIT && reload_completed
&& !fp_operand (operands[0], VOIDmode) && !FP_REG_P (operands[0])
&& !fp_operand (operands[1], VOIDmode) && !FP_REG_P (operands[1])
&& !s_operand (operands[1], VOIDmode)" && !s_operand (operands[1], VOIDmode)"
[(set (match_dup 0) (match_dup 1))] [(set (match_dup 0) (match_dup 1))]
" "
...@@ -1027,7 +1027,7 @@ ...@@ -1027,7 +1027,7 @@
if ((reload_in_progress || reload_completed) if ((reload_in_progress || reload_completed)
&& CONSTANT_P (operands[1]) && CONSTANT_P (operands[1])
&& (!legitimate_reload_constant_p (operands[1]) && (!legitimate_reload_constant_p (operands[1])
|| fp_operand (operands[0], VOIDmode))) || FP_REG_P (operands[0])))
operands[1] = force_const_mem (SImode, operands[1]); operands[1] = force_const_mem (SImode, operands[1]);
}") }")
...@@ -1036,7 +1036,7 @@ ...@@ -1036,7 +1036,7 @@
(match_operand:SI 1 "immediate_operand" "K"))] (match_operand:SI 1 "immediate_operand" "K"))]
"GET_CODE (operands[1]) == CONST_INT "GET_CODE (operands[1]) == CONST_INT
&& CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'K') && CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'K')
&& !fp_operand (operands[0], VOIDmode)" && !FP_REG_P (operands[0])"
"lhi\\t%0,%h1" "lhi\\t%0,%h1"
[(set_attr "op_type" "RI")]) [(set_attr "op_type" "RI")])
...@@ -1044,7 +1044,7 @@ ...@@ -1044,7 +1044,7 @@
[(set (match_operand:SI 0 "register_operand" "=d") [(set (match_operand:SI 0 "register_operand" "=d")
(match_operand:SI 1 "immediate_operand" "n"))] (match_operand:SI 1 "immediate_operand" "n"))]
"TARGET_64BIT && s390_single_hi (operands[1], SImode, 0) >= 0 "TARGET_64BIT && s390_single_hi (operands[1], SImode, 0) >= 0
&& !fp_operand (operands[0], VOIDmode)" && !FP_REG_P (operands[0])"
"* "*
{ {
int part = s390_single_hi (operands[1], SImode, 0); int part = s390_single_hi (operands[1], SImode, 0);
...@@ -1220,8 +1220,8 @@ ...@@ -1220,8 +1220,8 @@
[(set (match_operand:DF 0 "nonimmediate_operand" "") [(set (match_operand:DF 0 "nonimmediate_operand" "")
(match_operand:DF 1 "general_operand" ""))] (match_operand:DF 1 "general_operand" ""))]
"!TARGET_64BIT && reload_completed "!TARGET_64BIT && reload_completed
&& !fp_operand (operands[0], VOIDmode) && !FP_REG_P (operands[0])
&& !fp_operand (operands[1], VOIDmode) && !FP_REG_P (operands[1])
&& !s_operand (operands[0], VOIDmode) && !s_operand (operands[0], VOIDmode)
&& !s_operand (operands[1], VOIDmode) && !s_operand (operands[1], VOIDmode)
&& (register_operand (operands[0], VOIDmode) && (register_operand (operands[0], VOIDmode)
...@@ -1257,8 +1257,8 @@ ...@@ -1257,8 +1257,8 @@
[(set (match_operand:DF 0 "register_operand" "") [(set (match_operand:DF 0 "register_operand" "")
(match_operand:DF 1 "memory_operand" ""))] (match_operand:DF 1 "memory_operand" ""))]
"!TARGET_64BIT && reload_completed "!TARGET_64BIT && reload_completed
&& !fp_operand (operands[0], VOIDmode) && !FP_REG_P (operands[0])
&& !fp_operand (operands[1], VOIDmode) && !FP_REG_P (operands[1])
&& !s_operand (operands[1], VOIDmode)" && !s_operand (operands[1], VOIDmode)"
[(set (match_dup 0) (match_dup 1))] [(set (match_dup 0) (match_dup 1))]
" "
......
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