re PR rtl-optimization/81803 (miscompilation at -O1 on mips64el)

	PR rtl-optimization/81803
	* lra-constraints.c (curr_insn_transform): Also reload the whole
	register for a strict subreg no wider than a word if this is for
	a WORD_REGISTER_OPERATIONS target.

Co-Authored-By: Eric Botcazou <ebotcazou@adacore.com>

From-SVN: r254275

gcc/ChangeLog

+2017-10-31  Matthew Fortune  <matthew.fortune@imgtec.com>
+            Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR rtl-optimization/81803
+	* lra-constraints.c (curr_insn_transform): Also reload the whole
+	register for a strict subreg no wider than a word if this is for
+	a WORD_REGISTER_OPERATIONS target.
+
 2017-10-31  Jason Merrill  <jason@redhat.com>
 
 	* gdbinit.in: Skip over inlines from timevar.h.

gcc/lra-constraints.c

@@ -4207,8 +4207,9 @@ curr_insn_transform (bool check_only_p)
 	      reg = SUBREG_REG (*loc);
 	      byte = SUBREG_BYTE (*loc);
 	      if (REG_P (reg)
-		  /* Strict_low_part requires reload the register not
-		     the sub-register.	*/
+		  /* Strict_low_part requires reloading the register and not
+		     just the subreg.  Likewise for a strict subreg no wider
+		     than a word for WORD_REGISTER_OPERATIONS targets.  */
 		  && (curr_static_id->operand[i].strict_low
 		      || (!paradoxical_subreg_p (mode, GET_MODE (reg))
 			  && (hard_regno
@@ -4219,7 +4220,11 @@ curr_insn_transform (bool check_only_p)
 			  && (goal_alt[i] == NO_REGS
 			      || (simplify_subreg_regno
 				  (ira_class_hard_regs[goal_alt[i]][0],
-				   GET_MODE (reg), byte, mode) >= 0)))))
+				   GET_MODE (reg), byte, mode) >= 0)))
+		      || (GET_MODE_PRECISION (mode)
+			  < GET_MODE_PRECISION (GET_MODE (reg))
+			  && GET_MODE_SIZE (GET_MODE (reg)) <= UNITS_PER_WORD
+			  && WORD_REGISTER_OPERATIONS)))
 		{
 		  /* An OP_INOUT is required when reloading a subreg of a
 		     mode wider than a word to ensure that data beyond the