fr30.md: Only allow splits of immediate loads if the destination is a register.

2002-05-13  Scott Marks <SMarks@mobile-mind.com>
* config/fr30/fr30.md: Only allow splits of immediate loads if the destination
is a register.

From-SVN: r53418

gcc/ChangeLog

+2002-05-13  Scott Marks <SMarks@mobile-mind.com>
+
+	* config/fr30/fr30.md: Only allow splits of immediate loads
+	if the destination is a register.
+
 2002-05-13  Neil Booth  <neil@daikokuya.demon.co.uk>
 
 	* Makefile.in (c-common.o, cppinit.o): Update.

gcc/config/fr30/fr30.md

@@ -21,7 +21,6 @@
 
 ;;- See file "rtl.def" for documentation on define_insn, match_*, et. al.
 
-;;}}} 
 ;;{{{ Attributes 
 
 (define_attr "length" "" (const_int 2))
@@ -288,7 +287,8 @@
 (define_split
   [(set (match_operand:SI 0 "register_operand"  "")
 	(match_operand:SI 1 "immediate_operand" ""))]
-   "INTVAL (operands[1]) <= -1 && INTVAL (operands[1]) >= -128"
+   "INTVAL (operands[1]) <= -1 && INTVAL (operands[1]) >= -128
+   && GET_CODE (operands[0]) == REG"
    [(set:SI (match_dup 0) (match_dup 2))
     (set:SI (match_dup 0) (sign_extend:SI (subreg:QI (match_dup 0) 0)))]
    "{
@@ -302,7 +302,8 @@
 (define_split
   [(set (match_operand:SI 0 "register_operand"  "")
 	(match_operand:SI 1 "immediate_operand" ""))]
-   "(INTVAL (operands[1]) < 0) && ((INTVAL (operands[1]) & 0x00ffffff) == 0)"
+   "(INTVAL (operands[1]) < 0) && ((INTVAL (operands[1]) & 0x00ffffff) == 0)
+    && GET_CODE (operands[0]) == REG"
    [(set:SI (match_dup 0) (match_dup 2))
     (parallel [(set:SI (match_dup 0) (ashift:SI (match_dup 0) (const_int 24)))
 	       (clobber (reg:CC 16))])]
@@ -320,7 +321,8 @@
   [(set (match_operand:SI 0 "register_operand"  "")
 	(match_operand:SI 1 "immediate_operand" ""))]
    "(INTVAL (operands[1]) > 0x00ffffff)
-   && ((INTVAL (operands[1]) >> exact_log2 (INTVAL (operands[1]) & (- INTVAL (operands[1])))) < 0x100)"
+   && ((INTVAL (operands[1]) >> exact_log2 (INTVAL (operands[1]) & (- INTVAL (operands[1])))) < 0x100)
+   && GET_CODE (operands[0]) == REG"
    [(set:SI (match_dup 0) (match_dup 2))
     (parallel [(set:SI (match_dup 0) (ashift:SI (match_dup 0) (match_dup 3)))
 	       (clobber (reg:CC 16))])]