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riscv-gcc-1
Commit 8ca17330 by Alexandre Oliva Committed by Alexandre Oliva
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mn10300.md (movdi, movdf): Do not use `movu' when the operand is not constant. 

* config/mn10300/mn10300.md (movdi, movdf): Do not use `movu' when
the operand is not constant.

From-SVN: r33321
parent aad2919f
Showing with 21 additions and 8 deletions
gcc/ChangeLog
Fri Apr 21 18:11:56 2000 Alexandre Oliva <aoliva@cygnus.com>
* config/mn10300/mn10300.md (movdi, movdf): Do not use `movu' when
the operand is not constant.
Fri Apr 21 14:58:29 2000 Denis Chertykov <denisc@overta.ru> Fri Apr 21 14:58:29 2000 Denis Chertykov <denisc@overta.ru>
* reload.c (find_equiv_reg): Checks all valueno and regno regs * reload.c (find_equiv_reg): Checks all valueno and regno regs
......
gcc/config/mn10300/mn10300.md
...@@ -499,8 +499,10 @@ ...@@ -499,8 +499,10 @@
else else
output_asm_insn (\"mov %L1,%L0\", operands); output_asm_insn (\"mov %L1,%L0\", operands);
} }
else if ((REGNO_REG_CLASS (true_regnum (operands[0])) else if ((GET_CODE (operands[1]) == CONST_INT
== EXTENDED_REGS) || GET_CODE (operands[1]) == CONST_DOUBLE)
&& (REGNO_REG_CLASS (true_regnum (operands[0]))
== EXTENDED_REGS)
&& (((val[0] & 0x80) && ! (val[0] & 0xffffff00)) && (((val[0] & 0x80) && ! (val[0] & 0xffffff00))
|| ((val[0] & 0x800000) && ! (val[0] & 0xff000000)))) || ((val[0] & 0x800000) && ! (val[0] & 0xff000000))))
output_asm_insn (\"movu %1,%0\", operands); output_asm_insn (\"movu %1,%0\", operands);
...@@ -520,8 +522,10 @@ ...@@ -520,8 +522,10 @@
|| GET_CODE (operands[1]) == CONST_DOUBLE) || GET_CODE (operands[1]) == CONST_DOUBLE)
&& val[0] == val[1]) && val[0] == val[1])
output_asm_insn (\"mov %L0,%H0\", operands); output_asm_insn (\"mov %L0,%H0\", operands);
else if ((REGNO_REG_CLASS (true_regnum (operands[0])) else if ((GET_CODE (operands[1]) == CONST_INT
== EXTENDED_REGS) || GET_CODE (operands[1]) == CONST_DOUBLE)
&& (REGNO_REG_CLASS (true_regnum (operands[0]))
== EXTENDED_REGS)
&& (((val[1] & 0x80) && ! (val[1] & 0xffffff00)) && (((val[1] & 0x80) && ! (val[1] & 0xffffff00))
|| ((val[1] & 0x800000) && ! (val[1] & 0xff000000)))) || ((val[1] & 0x800000) && ! (val[1] & 0xff000000))))
output_asm_insn (\"movu %1,%0\", operands); output_asm_insn (\"movu %1,%0\", operands);
...@@ -643,8 +647,10 @@ ...@@ -643,8 +647,10 @@
else else
output_asm_insn (\"mov %L1,%L0\", operands); output_asm_insn (\"mov %L1,%L0\", operands);
} }
else if ((REGNO_REG_CLASS (true_regnum (operands[0])) else if ((GET_CODE (operands[1]) == CONST_INT
== EXTENDED_REGS) || GET_CODE (operands[1]) == CONST_DOUBLE)
&& (REGNO_REG_CLASS (true_regnum (operands[0]))
== EXTENDED_REGS)
&& (((val[0] & 0x80) && ! (val[0] & 0xffffff00)) && (((val[0] & 0x80) && ! (val[0] & 0xffffff00))
|| ((val[0] & 0x800000) && ! (val[0] & 0xff000000)))) || ((val[0] & 0x800000) && ! (val[0] & 0xff000000))))
output_asm_insn (\"movu %1,%0\", operands); output_asm_insn (\"movu %1,%0\", operands);
...@@ -664,8 +670,10 @@ ...@@ -664,8 +670,10 @@
|| GET_CODE (operands[1]) == CONST_DOUBLE) || GET_CODE (operands[1]) == CONST_DOUBLE)
&& val[0] == val[1]) && val[0] == val[1])
output_asm_insn (\"mov %L0,%H0\", operands); output_asm_insn (\"mov %L0,%H0\", operands);
else if ((REGNO_REG_CLASS (true_regnum (operands[0])) else if ((GET_CODE (operands[1]) == CONST_INT
== EXTENDED_REGS) || GET_CODE (operands[1]) == CONST_DOUBLE)
&& (REGNO_REG_CLASS (true_regnum (operands[0]))
== EXTENDED_REGS)
&& (((val[1] & 0x80) && ! (val[1] & 0xffffff00)) && (((val[1] & 0x80) && ! (val[1] & 0xffffff00))
|| ((val[1] & 0x800000) && ! (val[1] & 0xff000000)))) || ((val[1] & 0x800000) && ! (val[1] & 0xff000000))))
output_asm_insn (\"movu %1,%0\", operands); output_asm_insn (\"movu %1,%0\", operands);
......
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