pa.md (movccfp): New expander.

	PR/8705
	* pa.md (movccfp): New expander.
	(setccfp0, setccfp1): Rename to movccfp0 and movccfp1, respectively.
	Reverse fcmp conditions.

From-SVN: r65858

gcc/ChangeLog

+2003-04-20  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
+
+	PR/8705
+	* pa.md (movccfp): New expander.
+	(setccfp0, setccfp1): Rename to movccfp0 and movccfp1, respectively.
+	Reverse fcmp conditions.
+
 2003-04-20  Marek Michalkiewicz  <marekm@amelek.gda.pl>
 
 	* config/avr/avr.md (*cmpqi_sign_extend): Handle negative values

gcc/config/pa/pa.md

@@ -625,23 +625,37 @@
   [(set_attr "length" "4")
    (set_attr "type" "fpcc")])
 
-;; The following two patterns are optimization placeholders.  In almost
+;; Provide a means to emit the movccfp0 and movccfp1 optimization
+;; placeholders.  This is necessary in rare situations when a
+;; placeholder is re-emitted (see PR 8705).
+
+(define_expand "movccfp"
+  [(set (reg:CCFP 0)
+	(match_operand 0 "const_int_operand" ""))]
+  "! TARGET_SOFT_FLOAT"
+  "
+{
+  if ((unsigned HOST_WIDE_INT) INTVAL (operands[0]) > 1)
+    FAIL;
+}")
+
+;; The following patterns are optimization placeholders.  In almost
 ;; all cases, the user of the condition code will be simplified and the
 ;; original condition code setting insn should be eliminated.
 
-(define_insn "*setccfp0"
+(define_insn "*movccfp0"
   [(set (reg:CCFP 0)
 	(const_int 0))]
   "! TARGET_SOFT_FLOAT"
-  "fcmp,dbl,!= %%fr0,%%fr0"
+  "fcmp,dbl,= %%fr0,%%fr0"
   [(set_attr "length" "4")
    (set_attr "type" "fpcc")])
 
-(define_insn "*setccfp1"
+(define_insn "*movccfp1"
   [(set (reg:CCFP 0)
 	(const_int 1))]
   "! TARGET_SOFT_FLOAT"
-  "fcmp,dbl,= %%fr0,%%fr0"
+  "fcmp,dbl,!= %%fr0,%%fr0"
   [(set_attr "length" "4")
    (set_attr "type" "fpcc")])